Searched refs:POWER0_COM_DCLK (Results 1 – 1 of 1) sorted by relevance
50 #define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ macro119 lcdtg_ssp_i2c_send(lcd, data | POWER0_COM_DCLK); in lcdtg_i2c_send_bit()125 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT); in lcdtg_i2c_send_start()126 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK); in lcdtg_i2c_send_start()133 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK); in lcdtg_i2c_send_stop()134 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT); in lcdtg_i2c_send_stop()219 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF | in corgi_lcd_power_on()232 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | in corgi_lcd_power_on()250 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | in corgi_lcd_power_on()263 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | in corgi_lcd_power_on()