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Searched refs:RADEON_NUM_RINGS (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dradeon_sa.c63 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_manager_init()
230 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_event()
267 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_next_hole()
317 struct radeon_fence *fences[RADEON_NUM_RINGS]; in radeon_sa_bo_new()
318 unsigned tries[RADEON_NUM_RINGS]; in radeon_sa_bo_new()
335 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_new()
352 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()
357 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()
Dradeon_fence.c470 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_any_seq_signaled()
505 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()
526 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()
552 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_timeout()
615 uint64_t seq[RADEON_NUM_RINGS]; in radeon_fence_wait_any()
619 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_any()
653 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_next()
680 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_empty()
813 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_note_sync()
890 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_fence_driver_init_ring()
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Dradeon_sync.c48 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sync_create()
143 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sync_rings()
Dradeon_device.c1307 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_device_init()
1310 rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); in radeon_device_init()
1621 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_suspend_kms()
1785 unsigned ring_sizes[RADEON_NUM_RINGS]; in radeon_gpu_reset()
1786 uint32_t *ring_data[RADEON_NUM_RINGS]; in radeon_gpu_reset()
1808 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
1826 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
Dradeon_irq_kms.c130 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_preinstall_kms()
184 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_uninstall_kms()
Dradeon_vm.c180 struct radeon_fence *best[RADEON_NUM_RINGS] = {}; in radeon_vm_grab_id()
1008 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_vm_bo_update()
1183 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_init()
1262 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_fini()
Dradeon_ib.c265 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_ib_ring_tests()
Dradeon.h159 #define RADEON_NUM_RINGS 8 macro
369 uint64_t sync_seq[RADEON_NUM_RINGS];
551 struct list_head flist[RADEON_NUM_RINGS];
618 struct radeon_fence *sync_to[RADEON_NUM_RINGS];
800 atomic_t ring_int[RADEON_NUM_RINGS];
948 struct radeon_vm_id ids[RADEON_NUM_RINGS];
1893 const struct radeon_asic_ring *ring[RADEON_NUM_RINGS];
2378 struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];
2382 struct radeon_ring ring[RADEON_NUM_RINGS];
Dradeon_test.c530 for (i = 1; i < RADEON_NUM_RINGS; ++i) { in radeon_test_syncing()
Dradeon_pm.c266 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_pm_set_clocks()
1123 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_dpm_change_power_state_locked()
1846 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_dynpm_idle_work_handler()