Searched refs:REG_DSI_28nm_PHY_PLL_VREG_CFG (Results 1 – 2 of 2) sorted by relevance
449 cached_state->byte_mux = pll_read(base + REG_DSI_28nm_PHY_PLL_VREG_CFG); in dsi_pll_28nm_save_state()472 pll_write(base + REG_DSI_28nm_PHY_PLL_VREG_CFG, in dsi_pll_28nm_restore_state()560 REG_DSI_28nm_PHY_PLL_VREG_CFG, 1, 1, 0, NULL); in pll_28nm_register()
1149 #define REG_DSI_28nm_PHY_PLL_VREG_CFG 0x00000010 macro