Searched refs:REG_DSI_7nm_PHY_CMN_TIMING_CTRL_6 (Results 1 – 2 of 2) sorted by relevance
182 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_6, timing->hs_prepare); in dsi_7nm_phy_enable()
1945 #define REG_DSI_7nm_PHY_CMN_TIMING_CTRL_6 0x000000cc macro