Searched refs:REG_HDMI_PHY_QSERDES_COM_SVS_MODE_CLK_SEL (Results 1 – 2 of 2) sorted by relevance
1209 #define REG_HDMI_PHY_QSERDES_COM_SVS_MODE_CLK_SEL 0x0000019c macro
448 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SVS_MODE_CLK_SEL, in hdmi_8996_pll_set_clk_rate()