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Searched refs:SDMA0_BASE__INST3_SEG0 (Results 1 – 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h693 #define SDMA0_BASE__INST3_SEG0 0 macro
Dsienna_cichlid_ip_offset.h892 #define SDMA0_BASE__INST3_SEG0 0 macro
Dvega10_ip_offset.h1013 #define SDMA0_BASE__INST3_SEG0 0 macro
Drenoir_ip_offset.h1135 #define SDMA0_BASE__INST3_SEG0 0 macro
Darct_ip_offset.h939 #define SDMA0_BASE__INST3_SEG0 0 macro