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Searched refs:SDMA1_BASE__INST5_SEG3 (Results 1 – 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h752 #define SDMA1_BASE__INST5_SEG3 0 macro
Dsienna_cichlid_ip_offset.h949 #define SDMA1_BASE__INST5_SEG3 0 macro
Darct_ip_offset.h1005 #define SDMA1_BASE__INST5_SEG3 0 macro