/kernel/linux/linux-5.10/include/linux/ceph/ |
D | messenger.h | 92 #define __ceph_bio_iter_advance_step(it, n, STEP) do { \ argument 98 (void)(STEP); \ 136 #define __ceph_bvec_iter_advance_step(it, n, STEP) do { \ argument 138 (void)(STEP); \
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/kernel/linux/linux-5.10/arch/powerpc/crypto/ |
D | sha1-powerpc-asm.S | 114 STEP##fn##_UPDATE(t); \ 115 STEP##fn##_UPDATE((t)+1); \ 116 STEP##fn##_UPDATE((t)+2); \ 117 STEP##fn##_UPDATE((t)+3)
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/kernel/linux/linux-5.10/drivers/cpufreq/ |
D | imx6q-cpufreq.c | 29 STEP, enumerator 135 clk_set_parent(clks[STEP].clk, clks[SECONDARY_SEL].clk); in imx6q_set_target() 136 clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk); in imx6q_set_target() 142 clk_set_parent(clks[STEP].clk, clks[PLL2_PFD2_396M].clk); in imx6q_set_target() 143 clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk); in imx6q_set_target()
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/kernel/linux/linux-5.10/Documentation/PCI/ |
D | pci-error-recovery.rst | 118 STEP 0: Error Event 125 STEP 1: Notification 160 proceeds to STEP 2 (MMIO Enable). 163 then recovery proceeds to STEP 4 (Slot Reset). 166 is STEP 6 (Permanent Failure). 187 STEP 2: MMIO Enabled 201 instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset) 236 proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations). 239 proceeds to STEP 4 (Slot Reset) 241 STEP 3: Link Reset [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
D | viper.c | 181 #define STEP 0x100 in viper_set_core_cpu_voltage() macro 187 else if (current_voltage_divisor < divisor - STEP) in viper_set_core_cpu_voltage() 188 step = current_voltage_divisor + STEP; in viper_set_core_cpu_voltage() 189 else if (current_voltage_divisor > divisor + STEP) in viper_set_core_cpu_voltage() 190 step = current_voltage_divisor - STEP; in viper_set_core_cpu_voltage()
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_catalog.h | 20 #define DPU_HW_VER(MAJOR, MINOR, STEP) (((MAJOR & 0xF) << 28) |\ argument 22 (STEP & 0xFFFF))
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/slimbus/ |
D | slim-ngd-qcom-ctrl.txt | 13 Definition: must be "qcom,slim-ngd-v<MAJOR>.<MINOR>.<STEP>"
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/kernel/linux/linux-5.10/lib/ |
D | iov_iter.c | 18 #define iterate_iovec(i, n, __v, __p, skip, STEP) { \ argument 25 left = (STEP); \ 38 left = (STEP); \ 46 #define iterate_kvec(i, n, __v, __p, skip, STEP) { \ argument 52 (void)(STEP); \ 62 (void)(STEP); \ 69 #define iterate_bvec(i, n, __v, __bi, skip, STEP) { \ argument 77 (void)(STEP); \
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/kernel/linux/linux-5.10/drivers/block/ |
D | swim.c | 93 #define STEP 0x071 macro 369 swim_action(base, STEP); in swim_step() 377 if (!swim_readbit(base, STEP)) in swim_step()
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D | swim3.c | 133 #define STEP 1 macro 398 swim3_select(fs, STEP); in seek_track()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soundwire/ |
D | qcom,sdw.txt | 10 Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>",
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/kernel/linux/linux-5.10/drivers/scsi/aic7xxx/ |
D | aic7xxx_reg_print.c_shipped | 261 { "STEP", 0x04, 0x04 },
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D | aic79xx_reg_print.c_shipped | 581 { "STEP", 0x04, 0x04 },
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D | aic7xxx_reg.h_shipped | 549 #define STEP 0x04
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D | aic79xx_reg.h_shipped | 1467 #define STEP 0x04
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D | aic7xxx.reg | 616 field STEP 0x04
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D | aic79xx_core.c | 3497 ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) | STEP); in ahd_clear_critical_section() 3517 ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) & ~STEP); in ahd_clear_critical_section()
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D | aic79xx.reg | 3407 field STEP 0x04
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D | aic7xxx_core.c | 2037 ahc_outb(ahc, SEQCTL, ahc->seqctl | STEP); in ahc_clear_critical_section()
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
D | 0003_linux_crypto.patch | 896 + * STEP 1: create ICV together with necessary padding 903 + * STEP 2: Hash and padding are combined with the payload 951 + * STEP 3: encrypt the frame and return the result
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/kernel/linux/linux-5.10/drivers/scsi/aic94xx/ |
D | aic94xx_reg_def.h | 311 #define STEP 0x00000002 macro
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
D | 0036_linux_drivers_staging.patch | 36540 + /* Enable Custom Reverse Channel & First Pulse Length STEP 1 */ 36542 + msleep(2); /* STEP 2 */ 36545 + max9286_write_reg(max9286_data, 0x3B, 0x1E); /* STEP 3 */ 36546 + msleep(2); /* STEP 4 */ 36549 + max9271_write_reg(max9286_data, 0, 0x04, 0x43); /* STEP 5 */ 36550 + msleep(2); /* STEP 6 */ 36553 + max9271_write_reg(max9286_data, 0, 0x08, 0x01); /* STEP 7 */ 36554 + msleep(2); /* STEP 8 */ 36557 + max9286_write_reg(max9286_data, 0x3B, 0x19); /* STEP 9 */ 36558 + msleep(5); /* STEP 10 */ [all …]
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