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Searched refs:UMC_BASE__INST0_SEG1 (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h772 #define UMC_BASE__INST0_SEG1 0 macro
Dnavi12_ip_offset.h994 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dvega20_ip_offset.h841 #define UMC_BASE__INST0_SEG1 0 macro
Dnavi14_ip_offset.h994 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dsienna_cichlid_ip_offset.h1043 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dvega10_ip_offset.h1086 #define UMC_BASE__INST0_SEG1 0 macro
Drenoir_ip_offset.h1244 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Darct_ip_offset.h1426 #define UMC_BASE__INST0_SEG1 0x00014000 macro