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Searched refs:UMC_BASE__INST5_SEG0 (Results 1 – 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h806 #define UMC_BASE__INST5_SEG0 0 macro
Dnavi12_ip_offset.h1023 #define UMC_BASE__INST5_SEG0 0 macro
Dvega20_ip_offset.h875 #define UMC_BASE__INST5_SEG0 0 macro
Dnavi14_ip_offset.h1023 #define UMC_BASE__INST5_SEG0 0 macro
Dsienna_cichlid_ip_offset.h1072 #define UMC_BASE__INST5_SEG0 0x00154000 macro
Drenoir_ip_offset.h1273 #define UMC_BASE__INST5_SEG0 0 macro
Darct_ip_offset.h1460 #define UMC_BASE__INST5_SEG0 0x00013360 macro