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Searched refs:best_clock (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
Doaktrail_crtc.c38 int refclk, struct gma_clock_t *best_clock);
42 int refclk, struct gma_clock_t *best_clock);
125 int refclk, struct gma_clock_t *best_clock) in mrst_sdvo_find_best_pll() argument
131 memset(best_clock, 0, sizeof(*best_clock)); in mrst_sdvo_find_best_pll()
166 *best_clock = clock; in mrst_sdvo_find_best_pll()
183 int refclk, struct gma_clock_t *best_clock) in mrst_lvds_find_best_pll() argument
188 memset(best_clock, 0, sizeof(*best_clock)); in mrst_lvds_find_best_pll()
200 *best_clock = clock; in mrst_lvds_find_best_pll()
Dgma_display.h45 struct gma_clock_t *best_clock);
98 struct gma_clock_t *best_clock);
Doaktrail_hdmi.c176 int refclk, struct oaktrail_hdmi_clock *best_clock) in oaktrail_hdmi_find_dpll() argument
204 best_clock->np = np; in oaktrail_hdmi_find_dpll()
205 best_clock->nr = nr - 1; in oaktrail_hdmi_find_dpll()
206 best_clock->nf = (nf << 14); in oaktrail_hdmi_find_dpll()
Dgma_display.c752 struct gma_clock_t *best_clock) in gma_find_best_pll() argument
780 memset(best_clock, 0, sizeof(*best_clock)); in gma_find_best_pll()
802 *best_clock = clock; in gma_find_best_pll()
Dmdfld_intel_display.c608 struct mrst_clock_t *best_clock) in mdfldFindBestPLL() argument
614 memset(best_clock, 0, sizeof(*best_clock)); in mdfldFindBestPLL()
625 *best_clock = clock; in mdfldFindBestPLL()
Dcdv_intel_display.c24 int refclk, struct gma_clock_t *best_clock);
403 struct gma_clock_t *best_clock) in cdv_intel_find_dp_pll() argument
448 memcpy(best_clock, &clock, sizeof(struct gma_clock_t)); in cdv_intel_find_dp_pll()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.c2073 struct dpll best_clock; in bxt_ddi_hdmi_pll_dividers() local
2080 if (!bxt_find_best_dpll(crtc_state, &best_clock)) { in bxt_ddi_hdmi_pll_dividers()
2087 clk_div->p1 = best_clock.p1; in bxt_ddi_hdmi_pll_dividers()
2088 clk_div->p2 = best_clock.p2; in bxt_ddi_hdmi_pll_dividers()
2089 drm_WARN_ON(&i915->drm, best_clock.m1 != 2); in bxt_ddi_hdmi_pll_dividers()
2090 clk_div->n = best_clock.n; in bxt_ddi_hdmi_pll_dividers()
2091 clk_div->m2_int = best_clock.m2 >> 22; in bxt_ddi_hdmi_pll_dividers()
2092 clk_div->m2_frac = best_clock.m2 & ((1 << 22) - 1); in bxt_ddi_hdmi_pll_dividers()
2095 clk_div->vco = best_clock.vco; in bxt_ddi_hdmi_pll_dividers()
Dintel_display.c712 struct dpll *best_clock) in i9xx_find_best_dpll() argument
718 memset(best_clock, 0, sizeof(*best_clock)); in i9xx_find_best_dpll()
745 *best_clock = clock; in i9xx_find_best_dpll()
770 struct dpll *best_clock) in pnv_find_best_dpll() argument
776 memset(best_clock, 0, sizeof(*best_clock)); in pnv_find_best_dpll()
801 *best_clock = clock; in pnv_find_best_dpll()
826 struct dpll *best_clock) in g4x_find_best_dpll() argument
835 memset(best_clock, 0, sizeof(*best_clock)); in g4x_find_best_dpll()
859 *best_clock = clock; in g4x_find_best_dpll()
877 const struct dpll *best_clock, in vlv_PLL_is_optimal() argument
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Dintel_display.h584 struct dpll *best_clock);
Dintel_panel.c69 int best_clock = fixed_mode->clock; in intel_panel_edid_downclock_mode() local
80 scan->clock < best_clock) { in intel_panel_edid_downclock_mode()
85 best_clock = scan->clock; in intel_panel_edid_downclock_mode()