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Searched refs:cgr_val (Results 1 – 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-gate2.c32 u8 cgr_val; member
57 reg |= gate->cgr_val << gate->bit_idx; in clk_gate2_enable()
143 void __iomem *reg, u8 bit_idx, u8 cgr_val, in clk_hw_register_gate2() argument
159 gate->cgr_val = cgr_val; in clk_hw_register_gate2()
Dclk.h71 cgr_val, clk_gate_flags, lock, share_count) \ argument
73 cgr_val, clk_gate_flags, lock, share_count))
201 void __iomem *reg, u8 bit_idx, u8 cgr_val,
393 const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) in imx_clk_gate2_cgr() argument
396 shift, cgr_val, 0, &imx_ccm_lock, NULL); in imx_clk_gate2_cgr()
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0015_linux_drivers_clk.patch304 + reg |= gate->cgr_val << gate->bit_idx;
306 + reg &= ~(gate->cgr_val << gate->bit_idx);
359 - reg |= gate->cgr_val << gate->bit_idx;
393 +static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx, u8 cgr_val)
398 + if (((val >> bit_idx) & cgr_val) == 1)
413 + ret = clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx, gate->cgr_val);