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Searched refs:ch_regs (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/dma/
Dtegra210-adma.c121 struct tegra_adma_chan_regs ch_regs; member
142 struct tegra_adma_chan_regs ch_regs; member
354 struct tegra_adma_chan_regs *ch_regs; in tegra_adma_start() local
369 ch_regs = &desc->ch_regs; in tegra_adma_start()
373 tdma_ch_write(tdc, ADMA_CH_TC, ch_regs->tc); in tegra_adma_start()
374 tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl); in tegra_adma_start()
375 tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_regs->src_addr); in tegra_adma_start()
376 tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_regs->trg_addr); in tegra_adma_start()
377 tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl); in tegra_adma_start()
378 tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config); in tegra_adma_start()
[all …]
Dtegra20-apb-dma.c150 struct tegra_dma_channel_regs ch_regs; member
442 struct tegra_dma_channel_regs *ch_regs = &sg_req->ch_regs; in tegra_dma_start() local
444 tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr); in tegra_dma_start()
445 tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_regs->apb_seq); in tegra_dma_start()
446 tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_regs->apb_ptr); in tegra_dma_start()
447 tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_regs->ahb_seq); in tegra_dma_start()
448 tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_regs->ahb_ptr); in tegra_dma_start()
450 tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT, ch_regs->wcount); in tegra_dma_start()
454 ch_regs->csr | TEGRA_APBDMA_CSR_ENB); in tegra_dma_start()
488 tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, nsg_req->ch_regs.apb_ptr); in tegra_dma_configure_for_next()
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Dat_hdmac_regs.h65 #define ch_regs(x) (AT_DMA_CH_REGS_BASE + (x) * 0x28) /* Channel x base addr */ macro
250 void __iomem *ch_regs; member
269 __raw_readl((atchan)->ch_regs + ATC_##name##_OFFSET)
272 __raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET)
Dpch_dma.c120 struct pch_dma_desc_regs ch_regs[MAX_CHAN_NR]; member
752 pd->ch_regs[i].dev_addr = channel_readl(pd_chan, DEV_ADDR); in pch_dma_save_regs()
753 pd->ch_regs[i].mem_addr = channel_readl(pd_chan, MEM_ADDR); in pch_dma_save_regs()
754 pd->ch_regs[i].size = channel_readl(pd_chan, SIZE); in pch_dma_save_regs()
755 pd->ch_regs[i].next = channel_readl(pd_chan, NEXT); in pch_dma_save_regs()
775 channel_writel(pd_chan, DEV_ADDR, pd->ch_regs[i].dev_addr); in pch_dma_restore_regs()
776 channel_writel(pd_chan, MEM_ADDR, pd->ch_regs[i].mem_addr); in pch_dma_restore_regs()
777 channel_writel(pd_chan, SIZE, pd->ch_regs[i].size); in pch_dma_restore_regs()
778 channel_writel(pd_chan, NEXT, pd->ch_regs[i].next); in pch_dma_restore_regs()
Dtxx9dmac.h164 void __iomem *ch_regs; member
Dtxx9dmac.c26 return dc->ch_regs; in __dma_regs()
32 return dc->ch_regs; in __dma_regs32()
1130 dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1132 dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
Dat_xdmac.c186 void __iomem *ch_regs; member
257 #define at_xdmac_chan_read(atchan, reg) readl_relaxed((atchan)->ch_regs + (reg))
258 #define at_xdmac_chan_write(atchan, reg, value) writel_relaxed((value), (atchan)->ch_regs + (reg))
2066 atchan->ch_regs = at_xdmac_chan_reg_base(atxdmac, i); in at_xdmac_probe()
Dat_hdmac.c1849 atchan->ch_regs = atdma->regs + ch_regs(i); in at_dma_probe()
/kernel/linux/linux-5.10/drivers/dma/dw/
Dregs.h268 void __iomem *ch_regs; member
300 return dwc->ch_regs; in __dwc_regs()
Dcore.c1170 dwc->ch_regs = &__dw_regs(dw)->CHAN[i]; in do_dma_probe()