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Searched refs:clr_mask (Results 1 – 13 of 13) sorted by relevance

/kernel/linux/linux-5.10/drivers/hwmon/
Dlm75.c81 u8 clr_mask; member
126 .clr_mask = 1 << 5, /* not one-shot mode */
131 .clr_mask = 3 << 5,
140 .clr_mask = 3 << 5,
149 .clr_mask = 3 << 5,
213 .clr_mask = 1 << 7, /* not one-shot mode */
223 .clr_mask = 1 << 7, /* not one-shot mode */
232 .clr_mask = 1 << 7, /* not one-shot mode */
241 .clr_mask = 1 << 7, /* not one-shot mode*/
250 .clr_mask = 1 << 7, /* no one-shot mode*/
[all …]
Dmax31730.c62 u8 clr_mask) in max31730_write_config() argument
66 clr_mask |= MAX31730_EXTRANGE; in max31730_write_config()
67 value = data->current_conf & ~clr_mask; in max31730_write_config()
/kernel/linux/linux-5.10/drivers/net/ethernet/microchip/
Dencx24j600-regmap.c196 unsigned int clr_mask = mask & ~val; in regmap_encx24j600_reg_update_bits() local
209 if ((clr_mask & 0xff) && (ret == 0)) in regmap_encx24j600_reg_update_bits()
210 ret = regmap_encx24j600_sfr_clr_bits(ctx, reg, clr_mask); in regmap_encx24j600_reg_update_bits()
212 clr_mask = (clr_mask & 0xff00) >> 8; in regmap_encx24j600_reg_update_bits()
214 if ((clr_mask & 0xff) && (ret == 0)) in regmap_encx24j600_reg_update_bits()
215 ret = regmap_encx24j600_sfr_clr_bits(ctx, reg + 1, clr_mask); in regmap_encx24j600_reg_update_bits()
/kernel/linux/linux-5.10/drivers/net/phy/
Dbcm7xxx.c225 int set_mask, int clr_mask) in __phy_set_clr_bits() argument
233 v &= ~clr_mask; in __phy_set_clr_bits()
244 int set_mask, int clr_mask) in phy_set_clr_bits() argument
249 ret = __phy_set_clr_bits(dev, location, set_mask, clr_mask); in phy_set_clr_bits()
/kernel/linux/linux-5.10/drivers/infiniband/hw/mthca/
Dmthca_eq.c397 if (dev->eq_table.clr_mask) in mthca_tavor_interrupt()
398 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); in mthca_tavor_interrupt()
437 if (dev->eq_table.clr_mask) in mthca_arbel_interrupt()
438 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); in mthca_arbel_interrupt()
785 dev->eq_table.clr_mask = 0; in mthca_init_eq_table()
787 dev->eq_table.clr_mask = in mthca_init_eq_table()
Dmthca_dev.h228 u32 clr_mask; member
/kernel/linux/linux-5.10/drivers/mfd/
Dssbi.c94 static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) in ssbi_wait_mask() argument
101 if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0)) in ssbi_wait_mask()
/kernel/linux/linux-5.10/drivers/media/i2c/
Dths8200.c98 uint8_t clr_mask, uint8_t val_mask) in ths8200_write_and_or() argument
100 ths8200_write(sd, reg, (ths8200_read(sd, reg) & clr_mask) | val_mask); in ths8200_write_and_or()
Dadv7511-v4l2.c212 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) in adv7511_wr_and_or() argument
214 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask); in adv7511_wr_and_or()
301 static inline void adv7511_pktmem_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mas… in adv7511_pktmem_wr_and_or() argument
303 adv7511_pktmem_wr(sd, reg, (adv7511_pktmem_rd(sd, reg) & clr_mask) | val_mask); in adv7511_pktmem_wr_and_or()
Dad9389b.c135 u8 clr_mask, u8 val_mask) in ad9389b_wr_and_or() argument
137 ad9389b_wr(sd, reg, (ad9389b_rd(sd, reg) & clr_mask) | val_mask); in ad9389b_wr_and_or()
/kernel/linux/linux-5.10/drivers/dma/qcom/
Dbam_dma.c867 u32 clr_mask = 0, srcs = 0; in bam_dma_irq() local
881 clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS)); in bam_dma_irq()
889 writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR)); in bam_dma_irq()
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx4/
Deq.c855 writel(priv->eq_table.clr_mask, priv->eq_table.clr_int); in mlx4_interrupt()
1206 priv->eq_table.clr_mask = in mlx4_init_eq_table()
Dmlx4.h692 u32 clr_mask; member