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Searched refs:cntval_mask (Results 1 – 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/arch/x86/events/intel/
Dp6.c226 .cntval_mask = (1ULL << 32) - 1,
Dknc.c308 .cntval_mask = (1ULL << 40) - 1,
Dp4.c1323 .cntval_mask = ARCH_P4_CNTRVAL_MASK,
Dds.c1141 (u64)(-hwc->sample_period) & x86_pmu.cntval_mask; in intel_pmu_pebs_enable()
Dcore.c4980 x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1; in intel_pmu_init()
5613 x86_pmu.max_period = x86_pmu.cntval_mask >> 1; in intel_pmu_init()
/kernel/linux/linux-5.10/arch/x86/events/zhaoxin/
Dcore.c535 x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1; in zhaoxin_pmu_init()
546 x86_pmu.max_period = x86_pmu.cntval_mask >> 1; in zhaoxin_pmu_init()
/kernel/linux/linux-5.10/arch/x86/events/amd/
Dcore.c924 .cntval_mask = (1ULL << 48) - 1,
/kernel/linux/linux-5.10/arch/x86/events/
Dcore.c1365 wrmsrl(hwc->event_base, (u64)(-left) & x86_pmu.cntval_mask); in x86_perf_event_set_period()
1381 (u64)(-left) & x86_pmu.cntval_mask); in x86_perf_event_set_period()
2007 pr_info("... value mask: %016Lx\n", x86_pmu.cntval_mask); in init_hw_perf_events()
Dperf_event.h658 u64 cntval_mask; member