Searched refs:db_mask (Results 1 – 9 of 9) sorted by relevance
/kernel/linux/linux-5.10/drivers/ntb/hw/intel/ |
D | ntb_hw_intel.h | 115 unsigned long db_mask; member 162 u64 db_mask; member
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D | ntb_hw_gen1.c | 238 ndev->db_mask |= db_bits; in ndev_db_set_mask() 239 ndev->reg->db_iowrite(ndev->db_mask, mmio); in ndev_db_set_mask() 259 ndev->db_mask &= ~db_bits; in ndev_db_clear_mask() 260 ndev->reg->db_iowrite(ndev->db_mask, mmio); in ndev_db_clear_mask() 375 ndev->db_mask = ndev->db_valid_mask; in ndev_init_isr() 376 ndev->reg->db_iowrite(ndev->db_mask, in ndev_init_isr() 378 ndev->self_reg->db_mask); in ndev_init_isr() 472 ndev->db_mask = ndev->db_valid_mask; in ndev_deinit_isr() 473 ndev->reg->db_iowrite(ndev->db_mask, in ndev_deinit_isr() 475 ndev->self_reg->db_mask); in ndev_deinit_isr() [all …]
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D | ntb_hw_gen3.c | 76 .db_mask = GEN3_IM_INT_DISABLE_OFFSET, 83 .db_mask = GEN3_EM_INT_DISABLE_OFFSET, 221 ndev->self_reg->db_mask); in gen3_init_ntb() 318 "Doorbell Mask Cached -\t%#llx\n", ndev->db_mask); in ndev_ntb3_debugfs_read() 320 u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_mask); in ndev_ntb3_debugfs_read()
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D | ntb_hw_gen4.c | 34 .db_mask = GEN4_IM_INT_DISABLE_OFFSET, 154 ndev->self_reg->db_mask); in gen4_init_ntb() 280 "Doorbell Mask Cached -\t%#llx\n", ndev->db_mask); in ndev_ntb4_debugfs_read() 282 u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_mask); in ndev_ntb4_debugfs_read()
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/kernel/linux/linux-5.10/drivers/ntb/test/ |
D | ntb_pingpong.c | 315 u64 db_mask, msg_mask; in pp_mask_events() local 318 db_mask = ntb_db_valid_mask(pp->ntb); in pp_mask_events() 319 ret = ntb_db_set_mask(pp->ntb, db_mask); in pp_mask_events()
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D | ntb_tool.c | 307 u64 db_bits, db_mask; in tool_db_event() local 309 db_mask = ntb_db_vector_mask(tc->ntb, vec); in tool_db_event() 313 vec, db_mask, db_bits); in tool_db_event()
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/kernel/linux/linux-5.10/drivers/ntb/hw/mscc/ |
D | ntb_hw_switchtec.c | 69 u64 db_mask; member 652 sndev->db_mask |= db_bits << sndev->db_shift; in switchtec_ntb_db_set_mask() 653 iowrite64(~sndev->db_mask, &sndev->mmio_self_dbmsg->idb_mask); in switchtec_ntb_db_set_mask() 670 sndev->db_mask &= ~(db_bits << sndev->db_shift); in switchtec_ntb_db_clear_mask() 671 iowrite64(~sndev->db_mask, &sndev->mmio_self_dbmsg->idb_mask); in switchtec_ntb_db_clear_mask() 682 return (sndev->db_mask >> sndev->db_shift) & sndev->db_valid_mask; in switchtec_ntb_db_read_mask() 1236 sndev->db_mask = 0x0FFFFFFFFFFFFFFFULL; in switchtec_ntb_init_db() 1241 sndev->db_valid_mask = sndev->db_mask; in switchtec_ntb_init_db() 1252 iowrite64(~sndev->db_mask, &sndev->mmio_self_dbmsg->idb_mask); in switchtec_ntb_init_db()
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/kernel/linux/linux-5.10/drivers/ntb/hw/amd/ |
D | ntb_hw_amd.c | 448 ndev->db_mask |= db_bits; in amd_ntb_db_set_mask() 449 writew((u16)ndev->db_mask, mmio + AMD_DBMASK_OFFSET); in amd_ntb_db_set_mask() 465 ndev->db_mask &= ~db_bits; in amd_ntb_db_clear_mask() 466 writew((u16)ndev->db_mask, mmio + AMD_DBMASK_OFFSET); in amd_ntb_db_clear_mask() 719 ndev->db_mask = ndev->db_valid_mask; in ndev_init_isr() 819 ndev->db_mask = ndev->db_valid_mask; in ndev_deinit_isr() 820 writel(ndev->db_mask, mmio + AMD_DBMASK_OFFSET); in ndev_deinit_isr()
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D | ntb_hw_amd.h | 195 u64 db_mask; member
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