Searched refs:dcss_readl (Results 1 – 4 of 4) sorted by relevance
112 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS); in dcss_dtg_irq_handler()363 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS); in dcss_dtg_vblank_irq_enable()377 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS); in dcss_dtg_ctxld_kick_irq_enable()407 return !!(dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS) & LINE1_IRQ); in dcss_dtg_vblank_irq_valid()
18 #define dcss_readl(c) readl(c) macro
94 irq_status = dcss_readl(ctxld->ctxld_reg + DCSS_CTXLD_CONTROL_STATUS); in dcss_ctxld_irq_handler()
10751 + control = dcss_readl(dec400d->base_reg + DEC400D_CONTROL);10772 + control = dcss_readl(dec400d->base_reg + DEC400D_CONTROL);10804 + control = dcss_readl(dec400d->base_reg + DEC400D_CONTROL);11766 + b0 = dcss_readl(ch->base_reg + DCSS_DTRC_DCTL) & 0x1;11767 + b1 = dcss_readl(ch->base_reg + DTRC_F1_OFS + DCSS_DTRC_DCTL) & 0x1;11768 + curr_bank = dcss_readl(ch->base_reg + DCSS_DTRC_DTCTRL) >> 31;11972 + bank = dcss_readl(ch->base_reg + DCSS_DTRC_DTCTRL) >> 31;12088 + while (dcss_readl(ch->base_reg + DCSS_DTRC_DTCTRL) & HOT_RESET)12105 + curr_frame = dcss_readl(ch->base_reg + DCSS_DTRC_DTCTRL) >> 31;12149 + b0 = dcss_readl(ch->base_reg + DCSS_DTRC_DCTL) & 0x1;[all …]