Searched refs:ddc_base (Results 1 – 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/video/fbdev/i810/ |
| D | i810-i2c.c | 49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
64 i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
65 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setsda()
74 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK); in i810i2c_getscl()
75 i810_writel(mmio, chan->ddc_base, 0); in i810i2c_getscl()
76 return ((i810_readl(mmio, chan->ddc_base) & SCL_VAL_IN) != 0); in i810i2c_getscl()
85 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK); in i810i2c_getsda()
[all …]
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| D | i810.h | 250 unsigned long ddc_base; member
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| /kernel/linux/linux-5.10/drivers/video/fbdev/nvidia/ |
| D | nv_i2c.c | 34 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; in nvidia_gpio_setscl()
41 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); in nvidia_gpio_setscl()
50 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; in nvidia_gpio_setsda()
57 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); in nvidia_gpio_setsda()
66 if (NVReadCrtc(par, chan->ddc_base) & 0x04) in nvidia_gpio_getscl()
78 if (NVReadCrtc(par, chan->ddc_base) & 0x08) in nvidia_gpio_getsda()
128 par->chan[0].ddc_base = (par->reverse_i2c) ? 0x36 : 0x3e; in nvidia_create_i2c_busses()
132 par->chan[1].ddc_base = (par->reverse_i2c) ? 0x3e : 0x36; in nvidia_create_i2c_busses()
136 par->chan[2].ddc_base = 0x50; in nvidia_create_i2c_busses()
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| D | nv_type.h | 43 unsigned long ddc_base; member
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| /kernel/linux/linux-5.10/drivers/video/fbdev/riva/ |
| D | rivafb-i2c.c | 33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
51 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
59 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
69 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getscl()
82 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getsda()
132 par->chan[0].ddc_base = 0x36; in riva_create_i2c_busses()
133 par->chan[1].ddc_base = 0x3e; in riva_create_i2c_busses()
134 par->chan[2].ddc_base = 0x50; in riva_create_i2c_busses()
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| D | rivafb.h | 39 unsigned long ddc_base; member
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