| /kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/ |
| D | dcss-dpr.c | 92 struct dcss_dpr *dpr; member
123 struct dcss_dpr *dpr = ch->dpr; in dcss_dpr_write() local
125 dcss_ctxld_write(dpr->ctxld, dpr->ctx_id, val, ch->base_ofs + ofs); in dcss_dpr_write()
128 static int dcss_dpr_ch_init_all(struct dcss_dpr *dpr, unsigned long dpr_base) in dcss_dpr_ch_init_all() argument
134 ch = &dpr->ch[i]; in dcss_dpr_ch_init_all()
140 dev_err(dpr->dev, "dpr: unable to remap ch %d base\n", in dcss_dpr_ch_init_all()
145 ch->dpr = dpr; in dcss_dpr_ch_init_all()
156 struct dcss_dpr *dpr; in dcss_dpr_init() local
158 dpr = kzalloc(sizeof(*dpr), GFP_KERNEL); in dcss_dpr_init()
159 if (!dpr) in dcss_dpr_init()
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| D | dcss-dev.h | 69 struct dcss_dpr *dpr; member
127 void dcss_dpr_exit(struct dcss_dpr *dpr);
128 void dcss_dpr_write_sysctrl(struct dcss_dpr *dpr);
129 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres);
130 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr,
132 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en);
133 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num,
135 void dcss_dpr_set_rotation(struct dcss_dpr *dpr, int ch_num, u32 rotation);
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| D | dcss-plane.c | 241 dcss_dpr_addr_set(dcss->dpr, dcss_plane->ch_num, p1_ba, p2_ba, in dcss_plane_atomic_set_base()
305 dcss_dpr_format_set(dcss->dpr, dcss_plane->ch_num, state->fb->format, in dcss_plane_atomic_update()
308 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h); in dcss_plane_atomic_update()
309 dcss_dpr_set_rotation(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
332 dcss_dpr_enable(dcss->dpr, dcss_plane->ch_num, enable); in dcss_plane_atomic_update()
348 dcss_dpr_enable(dcss->dpr, dcss_plane->ch_num, false); in dcss_plane_atomic_disable()
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| D | Makefile | 2 dcss-ss.o dcss-dpr.o dcss-scaler.o dcss-kms.o dcss-crtc.o \
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| D | dcss-dev.c | 99 dcss_dpr_exit(dcss->dpr); in dcss_submodules_init()
122 dcss_dpr_exit(dcss->dpr); in dcss_submodules_stop()
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| D | dcss-ctxld.c | 266 dcss_dpr_write_sysctrl(dcss->dpr); in dcss_ctxld_enable_locked()
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | cn9130-db.dts | 196 i2c-mux@72 { /* verify address - depends on dpr */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/ |
| D | tg3.c | 6743 struct tg3_rx_prodring_set *dpr, in tg3_recycle_rx() argument
6756 dest_desc = &dpr->rx_std[dest_idx]; in tg3_recycle_rx()
6757 dest_map = &dpr->rx_std_buffers[dest_idx]; in tg3_recycle_rx()
6764 dest_desc = &dpr->rx_jmb[dest_idx].std; in tg3_recycle_rx()
6765 dest_map = &dpr->rx_jmb_buffers[dest_idx]; in tg3_recycle_rx()
7042 struct tg3_rx_prodring_set *dpr, in tg3_rx_prodring_xfer() argument
7066 tp->rx_std_ring_mask + 1 - dpr->rx_std_prod_idx); in tg3_rx_prodring_xfer()
7069 di = dpr->rx_std_prod_idx; in tg3_rx_prodring_xfer()
7072 if (dpr->rx_std_buffers[i].data) { in tg3_rx_prodring_xfer()
7088 memcpy(&dpr->rx_std_buffers[di], in tg3_rx_prodring_xfer()
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0001_linux_arch.patch | 1606 + dc0_dpr1_channel1: dpr-channel@560d0000 {
1607 + compatible = "fsl,imx8qxp-dpr-channel",
1608 + "fsl,imx8qm-dpr-channel";
1620 + dc0_dpr1_channel2: dpr-channel@560e0000 {
1621 + compatible = "fsl,imx8qxp-dpr-channel",
1622 + "fsl,imx8qm-dpr-channel";
1634 + dc0_dpr1_channel3: dpr-channel@560f0000 {
1635 + compatible = "fsl,imx8qxp-dpr-channel",
1636 + "fsl,imx8qm-dpr-channel";
1648 + dc0_dpr2_channel1: dpr-channel@56100000 {
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0020_linux_drivers_gpu.patch | 10130 dcss-ss.o dcss-dpr.o dcss-scaler.o dcss-kms.o dcss-crtc.o \
10899 dcss_dpr_exit(dcss->dpr);
10917 dcss_dpr_exit(dcss->dpr);
11259 diff --git a/drivers/gpu/drm/imx/dcss/dcss-dpr.c b/drivers/gpu/drm/imx/dcss/dcss-dpr.c
11261 --- a/drivers/gpu/drm/imx/dcss/dcss-dpr.c
11262 +++ b/drivers/gpu/drm/imx/dcss/dcss-dpr.c
11282 dpr->dev = dcss->dev;
11283 dpr->ctxld = dcss->ctxld;
11284 dpr->ctx_id = CTX_SB_HP;
11285 + dpr->dtrc = dcss->dtrc;
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