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Searched refs:dscr (Results 1 – 25 of 41) sorted by relevance

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/kernel/linux/linux-5.10/tools/testing/selftests/powerpc/dscr/
Ddscr_explicit_test.c22 unsigned long i, dscr = 0; in dscr_explicit() local
27 set_dscr(dscr); in dscr_explicit()
34 dscr++; in dscr_explicit()
35 if (dscr > DSCR_MAX) in dscr_explicit()
36 dscr = 0; in dscr_explicit()
38 set_dscr(dscr); in dscr_explicit()
42 if (cur_dscr != dscr) { in dscr_explicit()
44 "is %ld\n", dscr, cur_dscr); in dscr_explicit()
50 dscr++; in dscr_explicit()
51 if (dscr > DSCR_MAX) in dscr_explicit()
[all …]
Ddscr_inherit_test.c22 unsigned long i, dscr = 0; in dscr_inherit() local
28 set_dscr(dscr); in dscr_inherit()
33 dscr++; in dscr_inherit()
34 if (dscr > DSCR_MAX) in dscr_inherit()
35 dscr = 0; in dscr_inherit()
38 set_dscr_usr(dscr); in dscr_inherit()
40 set_dscr(dscr); in dscr_inherit()
65 if (cur_dscr != dscr) { in dscr_inherit()
67 "but is %ld\n", dscr, cur_dscr); in dscr_inherit()
72 if (cur_dscr_usr != dscr) { in dscr_inherit()
[all …]
Ddscr_inherit_exec_test.c44 unsigned long i, dscr = 0; in dscr_inherit_exec() local
50 dscr++; in dscr_inherit_exec()
51 if (dscr > DSCR_MAX) in dscr_inherit_exec()
52 dscr = 0; in dscr_inherit_exec()
54 if (dscr == get_default_dscr()) in dscr_inherit_exec()
58 set_dscr_usr(dscr); in dscr_inherit_exec()
60 set_dscr(dscr); in dscr_inherit_exec()
86 sprintf(dscr_str, "%ld", dscr); in dscr_inherit_exec()
Ddscr_default_test.c14 static unsigned long dscr; /* System DSCR default */ variable
32 d = dscr; in do_test()
71 dscr = 1; in dscr_default()
72 set_default_dscr(dscr); in dscr_default()
92 dscr++; in dscr_default()
93 if (dscr > DSCR_MAX) in dscr_default()
94 dscr = 0; in dscr_default()
96 set_default_dscr(dscr); in dscr_default()
/kernel/linux/linux-5.10/arch/c6x/platforms/
Ddscr.c114 static struct dscr_regs dscr; variable
121 if (dscr.locked[i].key && reg == dscr.locked[i].reg) in find_locked_reg()
122 return &dscr.locked[i]; in find_locked_reg()
132 void __iomem *reg_addr = dscr.base + reg; in dscr_write_locked1()
133 void __iomem *lock_addr = dscr.base + lock; in dscr_write_locked1()
162 soc_writel(key0, dscr.base + lock0); in dscr_write_locked2()
163 soc_writel(key1, dscr.base + lock1); in dscr_write_locked2()
164 soc_writel(val, dscr.base + reg); in dscr_write_locked2()
165 soc_writel(0, dscr.base + lock0); in dscr_write_locked2()
166 soc_writel(0, dscr.base + lock1); in dscr_write_locked2()
[all …]
DMakefile9 obj-y += dscr.o
/kernel/linux/linux-5.10/drivers/misc/mei/
Ddma-ring.c22 struct mei_dma_dscr *dscr) in mei_dmam_dscr_alloc() argument
24 if (!dscr->size) in mei_dmam_dscr_alloc()
27 if (WARN_ON(!is_power_of_2(dscr->size))) in mei_dmam_dscr_alloc()
30 if (dscr->vaddr) in mei_dmam_dscr_alloc()
33 dscr->vaddr = dmam_alloc_coherent(dev->dev, dscr->size, &dscr->daddr, in mei_dmam_dscr_alloc()
35 if (!dscr->vaddr) in mei_dmam_dscr_alloc()
48 struct mei_dma_dscr *dscr) in mei_dmam_dscr_free() argument
50 if (!dscr->vaddr) in mei_dmam_dscr_free()
53 dmam_free_coherent(dev->dev, dscr->size, dscr->vaddr, dscr->daddr); in mei_dmam_dscr_free()
54 dscr->vaddr = NULL; in mei_dmam_dscr_free()
/kernel/linux/linux-5.10/arch/c6x/boot/dts/
Dtms320c6455.dtsi57 ti,dscr-dev-enable = <13>;
68 ti,dscr-dev-enable = <4>;
80 compatible = "ti,c64x+dscr";
83 ti,dscr-devstat = <0>;
84 ti,dscr-silicon-rev = <8 28 0xf>;
85 ti,dscr-rmii-resets = <0 0x40020 0x00040000>;
87 ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
88 ti,dscr-devstate-ctl-regs =
92 ti,dscr-devstate-stat-regs =
Dtms320c6472.dtsi114 compatible = "ti,c64x+dscr";
117 ti,dscr-devstat = <0>;
118 ti,dscr-silicon-rev = <0x70c 16 0xff>;
120 ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
123 ti,dscr-rmii-resets = <0x208 1
126 ti,dscr-locked-regs = <0x200 0x204 0x0a1e183a
130 ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
132 ti,dscr-devstate-ctl-regs = <0 13 0x200 1 0 0 1>;
Dtms320c6457.dtsi45 compatible = "ti,c64x+dscr";
48 ti,dscr-devstat = <0x20>;
49 ti,dscr-silicon-rev = <0x18 28 0xf>;
50 ti,dscr-mac-fuse-regs = <0x114 3 4 5 6
52 ti,dscr-kick-regs = <0x38 0x83E70B13
Dtms320c6474.dtsi73 compatible = "ti,c64x+dscr";
76 ti,dscr-devstat = <0x004>;
77 ti,dscr-silicon-rev = <0x014 28 0xf>;
78 ti,dscr-mac-fuse-regs = <0x34 3 4 5 6
Dtms320c6678.dtsi136 compatible = "ti,c64x+dscr";
139 ti,dscr-devstat = <0x20>;
140 ti,dscr-silicon-rev = <0x18 28 0xf>;
142 ti,dscr-mac-fuse-regs = <0x110 1 2 3 4
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/c6x/
Ddscr.txt24 - compatible: must be "ti,c64x+dscr"
34 - ti,dscr-devstat
37 - ti,dscr-silicon-rev
40 - ti,dscr-rmii-resets
44 - ti,dscr-locked-regs
49 - ti,dscr-kick-regs
55 - ti,dscr-mac-fuse-regs
63 - ti,dscr-devstate-ctl-regs
79 - ti,dscr-devstate-stat-regs
96 - ti,dscr-privperm
[all …]
Demifa.txt18 - ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
41 ti,dscr-dev-enable = <13>;
/kernel/linux/linux-5.10/arch/arm/kernel/
Dhw_breakpoint.c226 u32 dscr; in monitor_mode_enabled() local
227 ARM_DBG_READ(c0, c1, 0, dscr); in monitor_mode_enabled()
228 return !!(dscr & ARM_DSCR_MDBGEN); in monitor_mode_enabled()
233 u32 dscr; in enable_monitor_mode() local
234 ARM_DBG_READ(c0, c1, 0, dscr); in enable_monitor_mode()
237 if (dscr & ARM_DSCR_MDBGEN) in enable_monitor_mode()
244 ARM_DBG_WRITE(c0, c1, 0, (dscr | ARM_DSCR_MDBGEN)); in enable_monitor_mode()
252 ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); in enable_monitor_mode()
260 ARM_DBG_READ(c0, c1, 0, dscr); in enable_monitor_mode()
261 if (!(dscr & ARM_DSCR_MDBGEN)) { in enable_monitor_mode()
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/powerpc/ptrace/
Dptrace-tar.h30 unsigned long ppr, unsigned long dscr) in validate_tar_registers() argument
40 if (reg[2] != dscr) in validate_tar_registers()
/kernel/linux/linux-5.10/Documentation/ABI/stable/
Dsysfs-devices-system-cpu6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
/kernel/linux/linux-5.10/tools/testing/selftests/powerpc/tm/
DMakefile5 TEST_GEN_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm-signal-stack \
23 $(OUTPUT)/tm-resched-dscr: ../pmu/lib.c
D.gitignore2 tm-resched-dscr
/kernel/linux/linux-5.10/arch/mips/alchemy/common/
Ddbdma.c934 u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) in au1xxx_dbdma_put_dscr() argument
961 dp->dscr_dest0 = dscr->dscr_dest0; in au1xxx_dbdma_put_dscr()
962 dp->dscr_source0 = dscr->dscr_source0; in au1xxx_dbdma_put_dscr()
963 dp->dscr_dest1 = dscr->dscr_dest1; in au1xxx_dbdma_put_dscr()
964 dp->dscr_source1 = dscr->dscr_source1; in au1xxx_dbdma_put_dscr()
965 dp->dscr_cmd1 = dscr->dscr_cmd1; in au1xxx_dbdma_put_dscr()
966 nbytes = dscr->dscr_cmd1; in au1xxx_dbdma_put_dscr()
969 dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; in au1xxx_dbdma_put_dscr()
/kernel/linux/linux-5.10/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_plane.c845 struct atmel_hlcdc_dma_channel_dscr *dscr; in atmel_hlcdc_plane_alloc_dscrs() local
848 dscr = dma_pool_alloc(dc->dscrpool, GFP_KERNEL, &dscr_dma); in atmel_hlcdc_plane_alloc_dscrs()
849 if (!dscr) in atmel_hlcdc_plane_alloc_dscrs()
852 dscr->addr = 0; in atmel_hlcdc_plane_alloc_dscrs()
853 dscr->next = dscr_dma; in atmel_hlcdc_plane_alloc_dscrs()
854 dscr->self = dscr_dma; in atmel_hlcdc_plane_alloc_dscrs()
855 dscr->ctrl = ATMEL_HLCDC_LAYER_DFETCH; in atmel_hlcdc_plane_alloc_dscrs()
857 state->dscrs[i] = dscr; in atmel_hlcdc_plane_alloc_dscrs()
/kernel/linux/linux-5.10/drivers/dma/
Dat_hdmac_regs.h173 u32 dscr; /* chain to next lli */ member
384 lli->ctrla, lli->ctrlb, &lli->dscr); in atc_dump_lli()
453 desc->lli.dscr = 0; in set_desc_eol()
/kernel/linux/linux-5.10/Documentation/powerpc/
Ddscr.rst16 dscr /* Thread DSCR value */
34 now be contained in thread struct's dscr into the register instead of
43 - CPU specific DSCR default: /sys/devices/system/cpu/cpuN/dscr
Dindex.rst17 dscr
/kernel/linux/linux-5.10/arch/powerpc/kernel/ptrace/
Dptrace-view.c124 *data = task->thread.dscr; in get_user_dscr()
128 static int set_user_dscr(struct task_struct *task, unsigned long dscr) in set_user_dscr() argument
130 task->thread.dscr = dscr; in set_user_dscr()
140 static int set_user_dscr(struct task_struct *task, unsigned long dscr) in set_user_dscr() argument
315 return membuf_write(&to, &target->thread.dscr, sizeof(u64)); in dscr_get()
322 &target->thread.dscr, 0, sizeof(u64)); in dscr_set()

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