Home
last modified time | relevance | path

Searched refs:fixed_clks (Results 1 – 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8516.c21 static const struct mtk_fixed_clk fixed_clks[] __initconst = { variable
691 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), in mtk_topckgen_init()
Dclk-mt8167.c22 static const struct mtk_fixed_clk fixed_clks[] __initconst = { variable
937 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), in mtk_topckgen_init()
Dclk-mt6765.c75 static const struct mtk_fixed_clk fixed_clks[] = { variable
824 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), in clk_mt6765_top_probe()
Dclk-mt8173.c26 static const struct mtk_fixed_clk fixed_clks[] __initconst = { variable
851 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data); in mtk_topckgen_init()
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk.c371 if (cmu->fixed_clks) in samsung_cmu_register_one()
372 samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks, in samsung_cmu_register_one()
Dclk.h297 const struct samsung_fixed_rate_clock *fixed_clks; member
Dclk-exynos7.c966 .fixed_clks = fixed_rate_clks_fsys0,
1095 .fixed_clks = fixed_rate_clks_fsys1,
Dclk-exynos5433.c797 .fixed_clks = top_fixed_clks,
2337 .fixed_clks = fsys_fixed_clks,
2886 .fixed_clks = disp_fixed_clks,
3058 .fixed_clks = aud_fixed_clks,
5090 .fixed_clks = cam0_fixed_clks,
5465 .fixed_clks = cam1_fixed_clks,
5650 if (info->fixed_clks) in exynos5433_cmu_probe()
5651 samsung_clk_register_fixed_rate(ctx, info->fixed_clks, in exynos5433_cmu_probe()
Dclk-exynos5260.c1827 .fixed_clks = fixed_rate_clks,