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Searched refs:hcr (Results 1 – 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/arch/arm64/include/asm/
Dhardirq.h25 u64 hcr; member
61 ___ctx->hcr = ___hcr; \
73 ___hcr = ___ctx->hcr; \
/kernel/linux/linux-5.10/drivers/usb/serial/
Dark3116.c67 __u32 hcr; /* handshake control register (0x8) member
145 priv->hcr = 0; in ark3116_port_probe()
202 __u8 lcr, hcr, eval; in ark3116_set_termios() local
231 hcr = (cflag & CRTSCTS) ? 0x03 : 0x00; in ark3116_set_termios()
262 __func__, hcr, lcr, quot); in ark3116_set_termios()
265 if (priv->hcr != hcr) { in ark3116_set_termios()
266 priv->hcr = hcr; in ark3116_set_termios()
267 ark3116_write_reg(serial, 0x8, hcr); in ark3116_set_termios()
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/include/hyp/
Dswitch.h104 u64 hcr = vcpu->arch.hcr_el2; in ___activate_traps() local
107 hcr |= HCR_TVM; in ___activate_traps()
109 write_sysreg(hcr, hcr_el2); in ___activate_traps()
111 if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) in ___activate_traps()
/kernel/linux/linux-5.10/drivers/infiniband/hw/mthca/
Dmthca_cmd.c194 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
257 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
258 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr()
259 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr()
260 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); in mthca_cmd_post_hcr()
261 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); in mthca_cmd_post_hcr()
262 __raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4); in mthca_cmd_post_hcr()
270 op), dev->hcr + 6 * 4); in mthca_cmd_post_hcr()
367 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 | in mthca_cmd_poll()
369 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); in mthca_cmd_poll()
[all …]
Dmthca_dev.h322 void __iomem *hcr; member
/kernel/linux/linux-5.10/drivers/net/wireless/intersil/hostap/
Dhostap_cs.c245 static void sandisk_write_hcr(local_info_t *local, int hcr) in sandisk_write_hcr() argument
253 HFA384X_OUTB(hcr, SANDISK_HCR_OFF); in sandisk_write_hcr()
369 static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) in prism2_pccard_genesis_reset() argument
379 sandisk_write_hcr(local, hcr); in prism2_pccard_genesis_reset()
400 res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr); in prism2_pccard_genesis_reset()
Dhostap_download.c388 static int prism2_enable_genesis(local_info_t *local, int hcr) in prism2_enable_genesis() argument
395 dev->name, hcr); in prism2_enable_genesis()
398 local->func->genesis_reset(local, hcr); in prism2_enable_genesis()
407 hcr); in prism2_enable_genesis()
411 hcr, initseq, readbuf); in prism2_enable_genesis()
Dhostap_plx.c297 static void prism2_plx_genesis_reset(local_info_t *local, int hcr) in prism2_plx_genesis_reset() argument
307 outb(hcr, hw_priv->cor_offset + 2); in prism2_plx_genesis_reset()
317 writeb(hcr, hw_priv->attr_mem + hw_priv->cor_offset + 2); in prism2_plx_genesis_reset()
Dhostap_pci.c268 static void prism2_pci_genesis_reset(local_info_t *local, int hcr) in prism2_pci_genesis_reset() argument
274 HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF); in prism2_pci_genesis_reset()
Dhostap_wlan.h577 void (*genesis_reset)(local_info_t *local, int hcr);
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx4/
Dcmd.c425 status = readl(mlx4_priv(dev)->cmd.hcr + HCR_STATUS_OFFSET); in cmd_pending()
437 u32 __iomem *hcr = cmd->hcr; in mlx4_cmd_post() local
482 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), hcr + 0); in mlx4_cmd_post()
483 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), hcr + 1); in mlx4_cmd_post()
484 __raw_writel((__force u32) cpu_to_be32(in_modifier), hcr + 2); in mlx4_cmd_post()
485 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3); in mlx4_cmd_post()
486 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4); in mlx4_cmd_post()
487 __raw_writel((__force u32) cpu_to_be32(token << 16), hcr + 5); in mlx4_cmd_post()
496 op), hcr + 6); in mlx4_cmd_post()
581 void __iomem *hcr = priv->cmd.hcr; in mlx4_cmd_poll() local
[all …]
Dmlx4.h629 void __iomem *hcr; member
/kernel/linux/linux-5.10/drivers/atm/
Dfore200e.c457 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { in fore200e_pca_irq_check()
469 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); in fore200e_pca_irq_ack()
476 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); in fore200e_pca_reset()
478 writel(0, fore200e->regs.pca.hcr); in fore200e_pca_reset()
496 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; in fore200e_pca_map()
646 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_enable() local
647 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); in fore200e_sba_irq_enable()
652 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; in fore200e_sba_irq_check()
657 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_ack() local
658 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); in fore200e_sba_irq_ack()
[all …]
Dfore200e.h773 volatile u32 __iomem * hcr; /* address of host control register */ member
782 u32 __iomem *hcr; /* address of host control register */ member
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/
Dvgic-v3-sr.c678 u32 hcr; in __vgic_v3_bump_eoicount() local
680 hcr = read_gicreg(ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
681 hcr += 1 << ICH_HCR_EOIcount_SHIFT; in __vgic_v3_bump_eoicount()
682 write_gicreg(hcr, ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
/kernel/linux/linux-5.10/arch/arm64/kvm/
Darm.c872 unsigned long *hcr; in vcpu_interrupt_line() local
879 hcr = vcpu_hcr(vcpu); in vcpu_interrupt_line()
881 set = test_and_set_bit(bit_index, hcr); in vcpu_interrupt_line()
883 set = test_and_clear_bit(bit_index, hcr); in vcpu_interrupt_line()
Dmmu.c1432 unsigned long hcr = *vcpu_hcr(vcpu); in kvm_set_way_flush() local
1443 if (!(hcr & HCR_TVM)) { in kvm_set_way_flush()
1447 *vcpu_hcr(vcpu) = hcr | HCR_TVM; in kvm_set_way_flush()
/kernel/linux/linux-5.10/drivers/infiniband/hw/hns/
Dhns_roce_hw_v1.c1604 u32 __iomem *hcr = (u32 __iomem *)(hr_dev->reg_base + ROCEE_MB1_REG); in hns_roce_v1_post_mbox() local
1630 writeq(in_param, hcr + 0); in hns_roce_v1_post_mbox()
1631 writeq(out_param, hcr + 2); in hns_roce_v1_post_mbox()
1632 writel(in_modifier, hcr + 4); in hns_roce_v1_post_mbox()
1636 writel(val, hcr + 5); in hns_roce_v1_post_mbox()
1644 u8 __iomem *hcr = hr_dev->reg_base + ROCEE_MB1_REG; in hns_roce_v1_chk_mbox() local
1658 __raw_readl(hcr + HCR_STATUS_OFFSET)); in hns_roce_v1_chk_mbox()