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Searched refs:input_rate (Results 1 – 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/mmp/
Dclk-pll.c24 unsigned long input_rate; member
73 rate = pll->input_rate; in mmp_clk_pll_recalc_rate()
104 unsigned long input_rate, in mmp_clk_register_pll() argument
127 pll->input_rate = input_rate; in mmp_clk_register_pll()
159 clks[i].input_rate, in mmp_register_pll_clks()
Dclk.h235 unsigned long input_rate; member
/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-pll.c526 for (sel = pll->params->freq_table; sel->input_rate != 0; sel++) in _get_table_rate()
527 if (sel->input_rate == parent_rate && in _get_table_rate()
531 if (sel->input_rate == 0) in _get_table_rate()
542 cfg->input_rate = sel->input_rate; in _get_table_rate()
956 unsigned long input_rate; in clk_plle_enable() local
963 input_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); in clk_plle_enable()
965 if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate)) in clk_plle_enable()
1119 unsigned long flags = 0, input_rate; in clk_pllu_enable() local
1129 input_rate = clk_hw_get_rate(osc); in clk_pllu_enable()
1142 if (input_rate == utmi_parameters[i].osc_frequency) { in clk_pllu_enable()
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Dclk-tegra210.c1060 unsigned long input_rate; in pllx_get_dyn_steps() local
1064 input_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); in pllx_get_dyn_steps()
1066 input_rate = 38400000; in pllx_get_dyn_steps()
1068 input_rate /= tegra_pll_get_fixed_mdiv(hw, input_rate); in pllx_get_dyn_steps()
1070 switch (input_rate) { in pllx_get_dyn_steps()
1087 __func__, input_rate); in pllx_get_dyn_steps()
1413 cfg->input_rate / cfg->m * cfg->n / in tegra210_pllx_dyn_ramp()
1429 unsigned long rate, unsigned long input_rate) in tegra210_pll_fixed_mdiv_cfg() argument
1450 cfg->m = tegra_pll_get_fixed_mdiv(hw, input_rate); in tegra210_pll_fixed_mdiv_cfg()
1459 cf = input_rate / cfg->m; in tegra210_pll_fixed_mdiv_cfg()
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Dclk.h165 unsigned long input_rate; member
905 u16 tegra_pll_get_fixed_mdiv(struct clk_hw *hw, unsigned long input_rate);
/kernel/linux/linux-5.10/sound/pci/ctxfi/
Dctatc.c195 atc_get_pitch(unsigned int input_rate, unsigned int output_rate) in atc_get_pitch() argument
201 pitch = (input_rate / output_rate) << 24; in atc_get_pitch()
202 input_rate %= output_rate; in atc_get_pitch()
203 input_rate /= 100; in atc_get_pitch()
205 for (b = 31; ((b >= 0) && !(input_rate >> b)); ) in atc_get_pitch()
209 input_rate <<= (31 - b); in atc_get_pitch()
210 input_rate /= output_rate; in atc_get_pitch()
213 input_rate <<= b; in atc_get_pitch()
215 input_rate >>= -b; in atc_get_pitch()
217 pitch |= input_rate; in atc_get_pitch()
/kernel/linux/linux-5.10/arch/c6x/include/asm/
Dclock.h109 u32 input_rate; member
/kernel/linux/linux-5.10/arch/c6x/platforms/
Dpll.c224 rate = pll->input_rate; in clk_sysclk_recalc()
276 rate = pll->input_rate = clk->parent->rate; in clk_pllclk_recalc()
/kernel/linux/linux-5.10/sound/soc/stm/
Dstm32_sai_sub.c315 unsigned long input_rate, in stm32_sai_get_clk_div() argument
321 div = DIV_ROUND_CLOSEST(input_rate, output_rate); in stm32_sai_get_clk_div()
328 if (input_rate % div) in stm32_sai_get_clk_div()
331 output_rate, input_rate / div); in stm32_sai_get_clk_div()