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Searched refs:input_reg (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/freescale/
Dpinctrl-imx.c218 val = readl(ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
221 writel(val, ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
222 } else if (pin_mmio->input_reg) { in imx_pmx_set_one_pin_mmio()
229 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
232 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
235 pin_mmio->input_reg, pin_mmio->input_val); in imx_pmx_set_one_pin_mmio()
545 pin_mmio->input_reg = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
Dpinctrl-imx.h32 u16 input_reg; member
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx6sx-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx6ul-pinctrl.txt10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx6sll-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx7ulp-pinctrl.txt17 <mux_conf_reg input_reg mux_mode input_val> are specified
Dfsl,imx7d-pinctrl.txt32 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx-pinctrl.txt26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
/kernel/linux/linux-5.10/drivers/pinctrl/mvebu/
Dpinctrl-armada-37xx.c1070 u32 mask, *irq_pol, input_reg, virq, type, level; in armada_3700_pinctrl_resume() local
1075 input_reg = INPUT_VAL; in armada_3700_pinctrl_resume()
1079 input_reg = INPUT_VAL + sizeof(u32); in armada_3700_pinctrl_resume()
1095 regmap_read(info->regmap, input_reg, &level); in armada_3700_pinctrl_resume()
/kernel/linux/linux-5.10/drivers/input/touchscreen/
Diqs5xx.c961 bool input_reg = !iqs5xx->input; in fw_file_store() local
985 if (input_reg) { in fw_file_store()
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0001_linux_arch.patch7365 + * <mux_reg conf_reg input_reg mux_mode input_val>