Searched refs:intr_en (Results 1 – 6 of 6) sorted by relevance
39 unsigned int intr_en; member230 host->intr_en &= MVSD_NOR_CARD_INT; in mvsd_request()231 host->intr_en |= intr | MVSD_NOR_ERROR; in mvsd_request()232 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); in mvsd_request()374 (intr_status & host->intr_en & in mvsd_irq()405 host->intr_en &= in mvsd_irq()407 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); in mvsd_irq()408 } else if (host->intr_en & MVSD_NOR_RX_FIFO_8W) { in mvsd_irq()409 host->intr_en &= ~MVSD_NOR_RX_FIFO_8W; in mvsd_irq()410 host->intr_en |= MVSD_NOR_RX_READY; in mvsd_irq()[all …]
52 int intr_en; member167 data->intr_en = state; in apds9300_set_intr_state()319 return data->intr_en; in apds9300_read_interrupt_config()
141 u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac4_dma_interrupt() local179 writel(intr_status & intr_en, ioaddr + DMA_CHAN_STATUS(chan)); in dwmac4_dma_interrupt()
329 u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan)); in dwxgmac2_dma_interrupt() local363 writel(intr_en & intr_status, ioaddr + XGMAC_DMA_CH_STATUS(chan)); in dwxgmac2_dma_interrupt()
232 u32 intr_en:1; member
314 bool intr_en; member1628 stc->oc_cfg.intr_en = 1; in soctherm_oc_cfg_parse()1924 soctherm_oc_intr_enable(ts, throt, oc->intr_en); in soctherm_oc_cfg_program()