Searched refs:memclk_mhz (Results 1 – 5 of 5) sorted by relevance
113 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; in dcn3_build_wm_range_table()292 …base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_update_clocks()388 clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz); in dcn3_set_hard_min_memclk()400 …base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_set_hard_max_memclk()414 &clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz, in dcn3_get_memclk_states_from_smu()
553 .memclk_mhz = 800,560 .memclk_mhz = 1600,567 .memclk_mhz = 1067,574 .memclk_mhz = 1600,809 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params()
75 unsigned int memclk_mhz; member
2281 …r->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz * 16; in dcn30_calculate_wm_and_dlg()2457 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn30_update_bw_bounding_box()2500 get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16, in dcn30_update_bw_bounding_box()2512 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn30_update_bw_bounding_box()2528 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()2543 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
1431 clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; in update_bw_bounding_box()