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/kernel/linux/linux-5.10/include/linux/mtd/
Dnand.h226 int (*erase)(struct nand_device *nand, const struct nand_pos *pos);
227 int (*markbad)(struct nand_device *nand, const struct nand_pos *pos);
228 bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos);
256 int (*init_ctx)(struct nand_device *nand);
257 void (*cleanup_ctx)(struct nand_device *nand);
258 int (*prepare_io_req)(struct nand_device *nand,
260 int (*finish_io_req)(struct nand_device *nand,
272 void of_get_nand_ecc_user_config(struct nand_device *nand);
273 int nand_ecc_init_ctx(struct nand_device *nand);
274 void nand_ecc_cleanup_ctx(struct nand_device *nand);
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/kernel/linux/linux-5.10/drivers/mtd/nand/
Dcore.c22 bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos) in nanddev_isbad() argument
24 if (nanddev_bbt_is_initialized(nand)) { in nanddev_isbad()
28 entry = nanddev_bbt_pos_to_entry(nand, pos); in nanddev_isbad()
29 status = nanddev_bbt_get_block_status(nand, entry); in nanddev_isbad()
32 if (nand->ops->isbad(nand, pos)) in nanddev_isbad()
37 nanddev_bbt_set_block_status(nand, entry, status); in nanddev_isbad()
47 return nand->ops->isbad(nand, pos); in nanddev_isbad()
61 int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos) in nanddev_markbad() argument
63 struct mtd_info *mtd = nanddev_to_mtd(nand); in nanddev_markbad()
67 if (nanddev_isbad(nand, pos)) in nanddev_markbad()
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Decc.c105 int nand_ecc_init_ctx(struct nand_device *nand) in nand_ecc_init_ctx() argument
107 if (!nand->ecc.engine->ops->init_ctx) in nand_ecc_init_ctx()
110 return nand->ecc.engine->ops->init_ctx(nand); in nand_ecc_init_ctx()
118 void nand_ecc_cleanup_ctx(struct nand_device *nand) in nand_ecc_cleanup_ctx() argument
120 if (nand->ecc.engine->ops->cleanup_ctx) in nand_ecc_cleanup_ctx()
121 nand->ecc.engine->ops->cleanup_ctx(nand); in nand_ecc_cleanup_ctx()
130 int nand_ecc_prepare_io_req(struct nand_device *nand, in nand_ecc_prepare_io_req() argument
133 if (!nand->ecc.engine->ops->prepare_io_req) in nand_ecc_prepare_io_req()
136 return nand->ecc.engine->ops->prepare_io_req(nand, req); in nand_ecc_prepare_io_req()
145 int nand_ecc_finish_io_req(struct nand_device *nand, in nand_ecc_finish_io_req() argument
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Dbbt.c23 int nanddev_bbt_init(struct nand_device *nand) in nanddev_bbt_init() argument
26 unsigned int nblocks = nanddev_neraseblocks(nand); in nanddev_bbt_init()
30 nand->bbt.cache = kcalloc(nwords, sizeof(*nand->bbt.cache), in nanddev_bbt_init()
32 if (!nand->bbt.cache) in nanddev_bbt_init()
45 void nanddev_bbt_cleanup(struct nand_device *nand) in nanddev_bbt_cleanup() argument
47 kfree(nand->bbt.cache); in nanddev_bbt_cleanup()
60 int nanddev_bbt_update(struct nand_device *nand) in nanddev_bbt_update() argument
74 int nanddev_bbt_get_block_status(const struct nand_device *nand, in nanddev_bbt_get_block_status() argument
78 unsigned long *pos = nand->bbt.cache + in nanddev_bbt_get_block_status()
83 if (entry >= nanddev_neraseblocks(nand)) in nanddev_bbt_get_block_status()
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dmeson_nand.c109 struct nand_chip nand; member
217 static struct meson_nfc_nand_chip *to_meson_nand(struct nand_chip *nand) in to_meson_nand() argument
219 return container_of(nand, struct meson_nfc_nand_chip, nand); in to_meson_nand()
222 static void meson_nfc_select_chip(struct nand_chip *nand, int chip) in meson_nfc_select_chip() argument
224 struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); in meson_nfc_select_chip()
225 struct meson_nfc *nfc = nand_get_controller_data(nand); in meson_nfc_select_chip()
265 static void meson_nfc_cmd_access(struct nand_chip *nand, int raw, bool dir, in meson_nfc_cmd_access() argument
268 struct mtd_info *mtd = nand_to_mtd(nand); in meson_nfc_cmd_access()
270 struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); in meson_nfc_cmd_access()
274 pagesize = nand->ecc.size; in meson_nfc_cmd_access()
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Dsunxi_nand.c193 struct nand_chip nand; member
201 static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) in to_sunxi_nand() argument
203 return container_of(nand, struct sunxi_nand_chip, nand); in to_sunxi_nand()
405 static void sunxi_nfc_select_chip(struct nand_chip *nand, unsigned int cs) in sunxi_nfc_select_chip() argument
407 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_select_chip()
408 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_select_chip()
409 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_select_chip()
420 ctl |= NFC_CE_SEL(sel->cs) | NFC_EN | NFC_PAGE_SHIFT(nand->page_shift); in sunxi_nfc_select_chip()
436 static void sunxi_nfc_read_buf(struct nand_chip *nand, uint8_t *buf, int len) in sunxi_nfc_read_buf() argument
438 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_read_buf()
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DMakefile3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
5 nand-$(CONFIG_MTD_NAND_ECC_SW_BCH) += nand_bch.o
47 obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
59 obj-$(CONFIG_MTD_NAND_CADENCE) += cadence-nand-controller.o
60 obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o
62 nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
63 nand-objs += nand_onfi.o
64 nand-objs += nand_jedec.o
65 nand-objs += nand_amd.o
66 nand-objs += nand_esmt.o
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Dfsmc_nand.c146 struct nand_chip nand; member
253 return container_of(chip, struct fsmc_nand_data, nand); in nand_to_fsmc()
275 if (host->nand.options & NAND_BUSWIDTH_16) in fsmc_nand_setup()
347 static int fsmc_setup_interface(struct nand_chip *nand, int csline, in fsmc_setup_interface() argument
350 struct fsmc_nand_data *host = nand_to_fsmc(nand); in fsmc_setup_interface()
855 struct nand_chip *nand) in fsmc_nand_probe_config_dt() argument
861 nand->options = 0; in fsmc_nand_probe_config_dt()
865 nand->options |= NAND_BUSWIDTH_16; in fsmc_nand_probe_config_dt()
873 nand->options |= NAND_SKIP_BBTSCAN; in fsmc_nand_probe_config_dt()
898 static int fsmc_nand_attach_chip(struct nand_chip *nand) in fsmc_nand_attach_chip() argument
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dmarvell-nand.txt5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
23 "marvell,armada-8k-nand[-controller]" compatibles).
28 This property is only used with "marvell,pxa3xx-nand[-controller]"
31 This property is only used with "marvell,pxa3xx-nand[-controller]"
39 - nand-rb: see nand-controller.yaml (0-1).
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Dsamsung-s3c2410.txt5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
9 - #address-cells, #size-cells : see nand-controller.yaml
10 - clocks : phandle to the nand controller clock
11 - clock-names : must contain "nand"
14 Child nodes representing the available nand chips.
17 - nand-ecc-mode : see nand-controller.yaml
18 - nand-on-flash-bbt : see nand-controller.yaml
26 nand-controller@4e000000 {
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Dnvidia-tegra20-nand.txt5 - "nvidia,tegra20-nand"
11 - nand
15 - nand
25 - nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
27 - nand-ecc-algo: string, algorithm of NAND ECC.
29 - nand-bus-width : See nand-controller.yaml
30 - nand-on-flash-bbt: See nand-controller.yaml
31 - nand-ecc-strength: integer representing the number of bits to correct
36 - nand-ecc-maximize: See nand-controller.yaml
37 - nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
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Dvf610-nfc.txt10 - #address-cells: shall be set to 1. Encode the nand CS.
23 Children nodes represent the available nand chips. Currently the driver can
28 - nand-bus-width: see nand-controller.yaml
29 - nand-ecc-mode: see nand-controller.yaml
32 - nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
33 - nand-ecc-step-size: step size equals page size, currently only 2k pages are
35 - nand-on-flash-bbt: see nand-controller.yaml
39 nfc: nand@400e0000 {
50 nand@0 {
53 nand-bus-width = <8>;
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Dhisi504-nand.txt10 - nand-bus-width: See nand-controller.yaml.
11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
29 nand: nand@4020000 {
33 nand-bus-width = <8>;
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
Dqcom_nandc.txt5 * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
7 * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
9 * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
50 - nand-bus-width: see nand-controller.yaml
51 - nand-ecc-strength: see nand-controller.yaml. If not specified, then ECC strength will
61 nand-controller@1ac00000 {
62 compatible = "qcom,ipq806x-nand";
77 nand@0 {
80 nand-ecc-strength = <4>;
81 nand-bus-width = <8>;
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Dtango-nand.txt5 - compatible: "sigma,smp8758-nand"
14 See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
18 nandc: nand-controller@2c000 {
19 compatible = "sigma,smp8758-nand";
27 nand@0 {
29 nand-ecc-strength = <14>;
30 nand-ecc-step-size = <1024>;
33 nand@1 {
35 nand-ecc-strength = <14>;
36 nand-ecc-step-size = <1024>;
Dbrcm,brcmnand.txt39 ranges. Should contain "nand" and (optionally)
40 "flash-dma" or "flash-edu" and/or "nand-cache".
45 May be "nand", if the SoC has the individual NAND
53 - clock-names : "nand" (required for the above clock)
54 - brcm,nand-has-wp : Some versions of this IP include a write-protect
76 * "brcm,nand-bcm63138"
79 - reg-names: (required) "nand-int-base"
81 * "brcm,nand-bcm6368"
82 - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm6368"
85 - reg-names: (required) "nand-int-base"
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Datmel-nand.txt12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
49 Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND
99 nand_controller: nand-controller {
100 compatible = "atmel,sama5d3-nand-controller";
108 nand@3 {
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Dmxic-nand.txt5 - compatible: should be "mxic,multi-itfc-v009-nand-controller"
17 See Documentation/devicetree/bindings/mtd/nand-controller.yaml
22 nand: nand-controller@43c30000 {
23 compatible = "mxic,multi-itfc-v009-nand-controller";
31 nand@0 {
33 nand-ecc-mode = "soft";
34 nand-ecc-algo = "bch";
Doxnas-nand.txt3 Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.
6 - compatible: "oxsemi,ox820-nand"
15 nandc: nand-controller@41000000 {
16 compatible = "oxsemi,ox820-nand";
23 nand@0 {
27 nand-ecc-mode = "soft";
28 nand-ecc-algo = "hamming";
/kernel/linux/linux-5.10/drivers/mtd/nand/spi/
Dcore.c53 struct nand_device *nand = spinand_to_nand(spinand); in spinand_get_cfg() local
56 spinand->cur_target >= nand->memorg.ntargets)) in spinand_get_cfg()
65 struct nand_device *nand = spinand_to_nand(spinand); in spinand_set_cfg() local
69 spinand->cur_target >= nand->memorg.ntargets)) in spinand_set_cfg()
119 struct nand_device *nand = spinand_to_nand(spinand); in spinand_select_target() local
122 if (WARN_ON(target >= nand->memorg.ntargets)) in spinand_select_target()
128 if (nand->memorg.ntargets == 1) { in spinand_select_target()
143 struct nand_device *nand = spinand_to_nand(spinand); in spinand_init_cfg_cache() local
149 nand->memorg.ntargets, in spinand_init_cfg_cache()
155 for (target = 0; target < nand->memorg.ntargets; target++) { in spinand_init_cfg_cache()
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/atmel/
Dnand-controller.c201 struct atmel_nand *nand);
203 int (*setup_interface)(struct atmel_nand *nand, int csline,
205 int (*exec_op)(struct atmel_nand *nand,
471 static void atmel_nand_data_in(struct atmel_nand *nand, void *buf, in atmel_nand_data_in() argument
476 nc = to_nand_controller(nand->base.controller); in atmel_nand_data_in()
485 !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len, in atmel_nand_data_in()
489 if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit) in atmel_nand_data_in()
490 ioread16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_data_in()
492 ioread8_rep(nand->activecs->io.virt, buf, len); in atmel_nand_data_in()
495 static void atmel_nand_data_out(struct atmel_nand *nand, const void *buf, in atmel_nand_data_out() argument
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/ingenic/
Dingenic_nand_drv.c143 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_ecc_hwctl() local
145 nand->reading = (mode == NAND_ECC_READ); in ingenic_nand_ecc_hwctl()
151 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_ecc_calculate() local
152 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_calculate()
159 if (nand->reading) in ingenic_nand_ecc_calculate()
162 params.size = nand->chip.ecc.size; in ingenic_nand_ecc_calculate()
163 params.bytes = nand->chip.ecc.bytes; in ingenic_nand_ecc_calculate()
164 params.strength = nand->chip.ecc.strength; in ingenic_nand_ecc_calculate()
172 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_ecc_correct() local
173 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_correct()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt24 mpp0 0 gpio, nand(io2), spi(cs)
25 mpp1 1 gpo, nand(io3), spi(mosi)
26 mpp2 2 gpo, nand(io4), spi(sck)
27 mpp3 3 gpo, nand(io5), spi(miso)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
29 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
45 mpp18 18 gpo, nand(io0)
46 mpp19 19 gpo, nand(io1)
62 mpp0 0 gpio, nand(io2), spi(cs)
63 mpp1 1 gpo, nand(io3), spi(mosi)
[all …]
Dlantiq,pinctrl-xway.txt51 ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,
62 ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,
63 nand rd, spi, spi_cs1, spi_cs2, spi_cs3, spi_cs4, spi_cs5, spi_cs6,
83 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
94 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
106 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
120 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
121 nand rdy, nand rd, nand_d0, nand_d1, nand_d2, nand_d3, nand_d4, nand_d5,
122 nand_d6, nand_d7, nand_d1, nand wr, nand wp, nand se, spi_di, spi_do,
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dat91-linea.dtsi61 nand: nand@3 { label
64 nand-bus-width = <8>;
65 nand-ecc-mode = "hw";
66 nand-ecc-strength = <4>;
67 nand-ecc-step-size = <512>;
68 nand-on-flash-bbt;

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