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Searched refs:nv_funcs (Results 1 – 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c907 funcs->nv_funcs.pp_smu.dm = ctx; in dm_pp_get_funcs()
908 funcs->nv_funcs.set_display_count = pp_nv_set_display_count; in dm_pp_get_funcs()
909 funcs->nv_funcs.set_hard_min_dcfclk_by_freq = in dm_pp_get_funcs()
911 funcs->nv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs()
913 funcs->nv_funcs.set_voltage_by_freq = in dm_pp_get_funcs()
915 funcs->nv_funcs.set_wm_ranges = pp_nv_set_wm_ranges; in dm_pp_get_funcs()
918 funcs->nv_funcs.set_pme_wa_enable = NULL; in dm_pp_get_funcs()
920 funcs->nv_funcs.set_hard_min_uclk_by_freq = pp_nv_set_hard_min_uclk_by_freq; in dm_pp_get_funcs()
922 funcs->nv_funcs.get_maximum_sustainable_clocks = pp_nv_get_maximum_sustainable_clocks; in dm_pp_get_funcs()
924 funcs->nv_funcs.get_uclk_dpm_states = pp_nv_get_uclk_dpm_states; in dm_pp_get_funcs()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c177 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in dcn2_update_clocks()
345 pp_smu = &clk_mgr->pp_smu->nv_funcs; in dcn2_enable_pme_wa()
428 if (!clk_mgr->pp_smu || !clk_mgr->pp_smu->nv_funcs.set_voltage_by_freq) in dcn2_notify_link_rate_change()
431 pp_smu = &clk_mgr->pp_smu->nv_funcs; in dcn2_notify_link_rate_change()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h286 struct pp_smu_funcs_nv nv_funcs; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c3742 if (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) {
3743 status = (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states)
3744 (&pool->base.pp_smu->nv_funcs.pp_smu, uclk_states, &num_states);
3749 if (pool->base.pp_smu->nv_funcs.get_maximum_sustainable_clocks) {
3750 status = (*pool->base.pp_smu->nv_funcs.get_maximum_sustainable_clocks)
3751 (&pool->base.pp_smu->nv_funcs.pp_smu, &max_clocks);
3990 if (pool->base.pp_smu->nv_funcs.set_wm_ranges)
3991 pool->base.pp_smu->nv_funcs.set_wm_ranges(&pool->base.pp_smu->nv_funcs.pp_smu, &ranges);