Searched refs:performance_levels (Results 1 – 13 of 13) sorted by relevance
809 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()810 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()811 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()812 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()813 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()814 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()815 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()816 ps->performance_levels[i].vddci = max_limits->vddci; in ni_apply_state_adjust_rules()824 ps->performance_levels[0].mclk = in ni_apply_state_adjust_rules()825 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()[all …]
2306 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2307 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()2326 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()2327 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()2333 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values()2342 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values()2401 if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) && in si_populate_sq_ramping_values()3015 if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) in si_apply_state_adjust_rules()3016 ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; in si_apply_state_adjust_rules()3020 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()[all …]
816 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()817 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()818 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()819 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()826 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()827 sclk = ps->performance_levels[0].sclk; in ci_apply_state_adjust_rules()829 mclk = ps->performance_levels[0].mclk; in ci_apply_state_adjust_rules()830 sclk = ps->performance_levels[0].sclk; in ci_apply_state_adjust_rules()840 ps->performance_levels[0].sclk = sclk; in ci_apply_state_adjust_rules()841 ps->performance_levels[0].mclk = mclk; in ci_apply_state_adjust_rules()[all …]
175 struct rv7xx_pl performance_levels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member
50 struct ci_pl performance_levels[CISLANDS_MAX_HARDWARE_POWERLEVELS]; member
3015 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()3016 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()3017 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()3018 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()3062 sclk = smu7_ps->performance_levels[0].engine_clock; in smu7_apply_state_adjust_rules()3063 mclk = smu7_ps->performance_levels[0].memory_clock; in smu7_apply_state_adjust_rules()3066 mclk = smu7_ps->performance_levels in smu7_apply_state_adjust_rules()3077 smu7_ps->performance_levels[0].engine_clock = sclk; in smu7_apply_state_adjust_rules()3078 smu7_ps->performance_levels[0].memory_clock = mclk; in smu7_apply_state_adjust_rules()3080 smu7_ps->performance_levels[1].engine_clock = in smu7_apply_state_adjust_rules()[all …]
3145 performance_level = &(vega10_power_state->performance_levels in vega10_get_pp_table_entry_callback_func()3169 performance_level = &(vega10_power_state->performance_levels in vega10_get_pp_table_entry_callback_func()3267 if (vega10_ps->performance_levels[i].mem_clock > in vega10_apply_state_adjust_rules()3269 vega10_ps->performance_levels[i].mem_clock = in vega10_apply_state_adjust_rules()3271 if (vega10_ps->performance_levels[i].gfx_clock > in vega10_apply_state_adjust_rules()3273 vega10_ps->performance_levels[i].gfx_clock = in vega10_apply_state_adjust_rules()3329 sclk = vega10_ps->performance_levels[0].gfx_clock; in vega10_apply_state_adjust_rules()3330 mclk = vega10_ps->performance_levels[0].mem_clock; in vega10_apply_state_adjust_rules()3340 vega10_ps->performance_levels[0].gfx_clock = sclk; in vega10_apply_state_adjust_rules()3341 vega10_ps->performance_levels[0].mem_clock = mclk; in vega10_apply_state_adjust_rules()[all …]
85 struct smu7_performance_level performance_levels[SMU7_MAX_HARDWARE_POWERLEVELS]; member
112 struct vega10_performance_level performance_levels[VEGA10_MAX_HARDWARE_POWERLEVELS]; member
129 struct vega20_performance_level performance_levels[VEGA20_MAX_HARDWARE_POWERLEVELS]; member
2402 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2403 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()2421 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()2422 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()2428 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values()2437 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values()2496 if ((state->performance_levels[i].sclk >= adev->pm.dpm.sq_ramping_threshold) && in si_populate_sq_ramping_values()3163 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3164 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3181 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()[all …]
617 struct rv7xx_pl performance_levels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member
148 const struct sabi_performance_level performance_levels[4]; member205 .performance_levels = {268 .performance_levels = {672 for (i = 0; config->performance_levels[i].name; ++i) { in get_performance_level()673 if (sretval.data[0] == config->performance_levels[i].value) in get_performance_level()674 return sprintf(buf, "%s\n", config->performance_levels[i].name); in get_performance_level()691 for (i = 0; config->performance_levels[i].name; ++i) { in set_performance_level()693 &config->performance_levels[i]; in set_performance_level()702 if (!config->performance_levels[i].name) in set_performance_level()1216 ok = !!samsung->config->performance_levels[0].name; in samsung_sysfs_is_visible()