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Searched refs:regval (Results 1 – 25 of 299) sorted by relevance

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/kernel/linux/linux-5.10/drivers/net/ethernet/synopsys/
Ddwc-xlgmac-hw.c38 u32 regval; in xlgmac_disable_rx_csum() local
40 regval = readl(pdata->mac_regs + MAC_RCR); in xlgmac_disable_rx_csum()
41 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS, in xlgmac_disable_rx_csum()
43 writel(regval, pdata->mac_regs + MAC_RCR); in xlgmac_disable_rx_csum()
50 u32 regval; in xlgmac_enable_rx_csum() local
52 regval = readl(pdata->mac_regs + MAC_RCR); in xlgmac_enable_rx_csum()
53 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS, in xlgmac_enable_rx_csum()
55 writel(regval, pdata->mac_regs + MAC_RCR); in xlgmac_enable_rx_csum()
112 u32 regval; in xlgmac_enable_rx_vlan_stripping() local
114 regval = readl(pdata->mac_regs + MAC_VLANTR); in xlgmac_enable_rx_vlan_stripping()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_opp_csc_v.c132 tbl_entry->regval[0], in program_color_matrix_v()
138 tbl_entry->regval[1], in program_color_matrix_v()
150 tbl_entry->regval[2], in program_color_matrix_v()
156 tbl_entry->regval[3], in program_color_matrix_v()
168 tbl_entry->regval[4], in program_color_matrix_v()
174 tbl_entry->regval[5], in program_color_matrix_v()
186 tbl_entry->regval[6], in program_color_matrix_v()
192 tbl_entry->regval[7], in program_color_matrix_v()
204 tbl_entry->regval[8], in program_color_matrix_v()
210 tbl_entry->regval[9], in program_color_matrix_v()
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/cx23885/
Dcx23885-417.c275 u32 regval; in cx23885_mc417_init() local
280 regval = MC417_SPD_CTL(MC417_SPD_CTL_FAST) | in cx23885_mc417_init()
283 cx_write(MC417_CTL, regval); in cx23885_mc417_init()
286 regval = MC417_MIRDY; in cx23885_mc417_init()
287 cx_write(MC417_OEN, regval); in cx23885_mc417_init()
290 regval = MC417_MIWR | MC417_MIRD | MC417_MICS; in cx23885_mc417_init()
291 cx_write(MC417_RWD, regval); in cx23885_mc417_init()
311 u32 regval; in mc417_register_write() local
319 regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0 | in mc417_register_write()
321 cx_write(MC417_RWD, regval); in mc417_register_write()
[all …]
/kernel/linux/linux-5.10/drivers/rapidio/switches/
Dtsi57x.c120 u32 regval; in tsi57x_set_domain() local
128 TSI578_SP_MODE_GLBL, &regval); in tsi57x_set_domain()
130 regval & ~TSI578_SP_MODE_LUT_512); in tsi57x_set_domain()
142 u32 regval; in tsi57x_get_domain() local
148 TSI578_GLBL_ROUTE_BASE, &regval); in tsi57x_get_domain()
150 *sw_domain = (u8)(regval >> 24); in tsi57x_get_domain()
158 u32 regval; in tsi57x_em_init() local
167 TSI578_SP_MODE(portnum), &regval); in tsi57x_em_init()
170 regval & ~TSI578_SP_MODE_PW_DIS); in tsi57x_em_init()
175 &regval); in tsi57x_em_init()
[all …]
Didt_gen2.c199 u32 regval; in idtg2_get_domain() local
205 IDT_RIO_DOMAIN, &regval); in idtg2_get_domain()
207 *sw_domain = (u8)(regval & 0xff); in idtg2_get_domain()
215 u32 regval; in idtg2_em_init() local
240 rio_read_config_32(rdev, IDT_DEV_CTRL_1, &regval); in idtg2_em_init()
242 regval | IDT_DEV_CTRL_1_GENPW | IDT_DEV_CTRL_1_PRSTBEH); in idtg2_em_init()
258 rio_read_config_32(rdev, IDT_PORT_OPS(i), &regval); in idtg2_em_init()
260 IDT_PORT_OPS(i), regval | IDT_PORT_OPS_GENPW | in idtg2_em_init()
280 rio_read_config_32(rdev, IDT_LANE_CTRL(i), &regval); in idtg2_em_init()
282 regval | IDT_LANE_CTRL_GENPW); in idtg2_em_init()
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/kernel/linux/linux-5.10/drivers/hwmon/
Dmax31730.c85 u8 regval = *confdata; in max31730_set_enable() local
89 regval |= BIT(channel); in max31730_set_enable()
91 regval &= ~BIT(channel); in max31730_set_enable()
93 if (regval != *confdata) { in max31730_set_enable()
94 err = i2c_smbus_write_byte_data(client, reg, regval); in max31730_set_enable()
97 *confdata = regval; in max31730_set_enable()
120 int regval, reg, offset; in max31730_read() local
154 regval = i2c_smbus_read_byte_data(data->client, in max31730_read()
156 if (regval < 0) in max31730_read()
157 return regval; in max31730_read()
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Dmax6621.c167 static int max6621_verify_reg_data(struct device *dev, int regval) in max6621_verify_reg_data() argument
169 if (regval >= MAX6621_PECI_ERR_MIN && in max6621_verify_reg_data()
170 regval <= MAX6621_PECI_ERR_MAX) { in max6621_verify_reg_data()
172 regval); in max6621_verify_reg_data()
177 switch (regval) { in max6621_verify_reg_data()
180 regval); in max6621_verify_reg_data()
183 dev_dbg(dev, "Polling disabled - err 0x%04x.\n", regval); in max6621_verify_reg_data()
187 regval); in max6621_verify_reg_data()
190 dev_dbg(dev, "Resource is disabled - err 0x%04x.\n", regval); in max6621_verify_reg_data()
193 dev_dbg(dev, "No alert active - err 0x%04x.\n", regval); in max6621_verify_reg_data()
[all …]
Dk10temp.c100 void (*read_htcreg)(struct pci_dev *pdev, u32 *regval);
101 void (*read_tempreg)(struct pci_dev *pdev, u32 *regval);
130 static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval) in read_htcreg_pci() argument
132 pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, regval); in read_htcreg_pci()
135 static void read_tempreg_pci(struct pci_dev *pdev, u32 *regval) in read_tempreg_pci() argument
137 pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, regval); in read_tempreg_pci()
151 static void read_htcreg_nb_f15(struct pci_dev *pdev, u32 *regval) in read_htcreg_nb_f15() argument
154 F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET, regval); in read_htcreg_nb_f15()
157 static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval) in read_tempreg_nb_f15() argument
160 F15H_M60H_REPORTED_TEMP_CTRL_OFFSET, regval); in read_tempreg_nb_f15()
[all …]
Dmlxreg-fan.c118 u32 regval; in mlxreg_fan_read() local
126 err = regmap_read(fan->regmap, tacho->reg, &regval); in mlxreg_fan_read()
130 *val = MLXREG_FAN_GET_RPM(regval, fan->divider, in mlxreg_fan_read()
135 err = regmap_read(fan->regmap, tacho->reg, &regval); in mlxreg_fan_read()
139 *val = MLXREG_FAN_GET_FAULT(regval, tacho->mask); in mlxreg_fan_read()
150 err = regmap_read(fan->regmap, fan->pwm.reg, &regval); in mlxreg_fan_read()
154 *val = regval; in mlxreg_fan_read()
274 u32 regval; in mlxreg_fan_get_cur_state() local
277 err = regmap_read(fan->regmap, fan->pwm.reg, &regval); in mlxreg_fan_get_cur_state()
283 *state = MLXREG_FAN_PWM_DUTY2STATE(regval); in mlxreg_fan_get_cur_state()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Domap_phy_internal.c58 u32 regval; in am35x_musb_reset() local
61 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
63 regval |= AM35XX_USBOTGSS_SW_RST; in am35x_musb_reset()
64 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
66 regval &= ~AM35XX_USBOTGSS_SW_RST; in am35x_musb_reset()
67 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
69 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
112 u32 regval; in am35x_musb_clear_irq() local
114 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35x_musb_clear_irq()
115 regval |= AM35XX_USBOTGSS_INT_CLR; in am35x_musb_clear_irq()
[all …]
/kernel/linux/linux-5.10/drivers/power/supply/
Dadp5061.c178 unsigned int regval; in adp5061_get_input_current_limit() local
181 ret = regmap_read(st->regmap, ADP5061_VINX_SET, &regval); in adp5061_get_input_current_limit()
185 mode = ADP5061_VINX_SET_ILIM_MODE(regval); in adp5061_get_input_current_limit()
228 unsigned int regval; in adp5061_get_min_voltage() local
231 ret = regmap_read(st->regmap, ADP5061_VOLTAGE_TH, &regval); in adp5061_get_min_voltage()
235 regval = ((regval & ADP5061_VOLTAGE_TH_VTRK_DEAD_MSK) >> 3); in adp5061_get_min_voltage()
236 val->intval = adp5061_vmin[regval] * 1000; in adp5061_get_min_voltage()
244 unsigned int regval; in adp5061_get_chg_volt_lim() local
247 ret = regmap_read(st->regmap, ADP5061_TERM_SET, &regval); in adp5061_get_chg_volt_lim()
251 mode = ADP5061_TERM_SET_CHG_VLIM_MODE(regval); in adp5061_get_chg_volt_lim()
[all …]
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/sec/
Dsec_drv.c255 u32 regval; in sec_queue_ar_pkgattr() local
257 regval = readl_relaxed(addr); in sec_queue_ar_pkgattr()
259 regval |= SEC_Q_ARUSER_CFG_PKG; in sec_queue_ar_pkgattr()
261 regval &= ~SEC_Q_ARUSER_CFG_PKG; in sec_queue_ar_pkgattr()
262 writel_relaxed(regval, addr); in sec_queue_ar_pkgattr()
270 u32 regval; in sec_queue_aw_pkgattr() local
272 regval = readl_relaxed(addr); in sec_queue_aw_pkgattr()
273 regval |= SEC_Q_AWUSER_CFG_PKG; in sec_queue_aw_pkgattr()
274 writel_relaxed(regval, addr); in sec_queue_aw_pkgattr()
361 u32 regval; in sec_bd_endian_little() local
[all …]
/kernel/linux/linux-5.10/arch/arm64/kvm/
Dvgic-sys-reg-v3.c23 val = p->regval; in access_gic_ctlr()
81 p->regval = val; in access_gic_ctlr()
94 vmcr.pmr = (p->regval & ICC_PMR_EL1_MASK) >> ICC_PMR_EL1_SHIFT; in access_gic_pmr()
97 p->regval = (vmcr.pmr << ICC_PMR_EL1_SHIFT) & ICC_PMR_EL1_MASK; in access_gic_pmr()
110 vmcr.bpr = (p->regval & ICC_BPR0_EL1_MASK) >> in access_gic_bpr0()
114 p->regval = (vmcr.bpr << ICC_BPR0_EL1_SHIFT) & in access_gic_bpr0()
127 p->regval = 0; in access_gic_bpr1()
132 vmcr.abpr = (p->regval & ICC_BPR1_EL1_MASK) >> in access_gic_bpr1()
136 p->regval = (vmcr.abpr << ICC_BPR1_EL1_SHIFT) & in access_gic_bpr1()
141 p->regval = min((vmcr.bpr + 1), 7U); in access_gic_bpr1()
[all …]
/kernel/linux/linux-5.10/drivers/phy/marvell/
Dphy-berlin-sata.c68 u32 regval; in phy_berlin_sata_reg_setbits() local
74 regval = readl(ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
75 regval &= ~mask; in phy_berlin_sata_reg_setbits()
76 regval |= val; in phy_berlin_sata_reg_setbits()
77 writel(regval, ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
85 u32 regval; in phy_berlin_sata_power_on() local
93 regval = readl(priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
94 regval &= ~desc->power_bit; in phy_berlin_sata_power_on()
95 writel(regval, priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
99 regval = readl(priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
[all …]
/kernel/linux/linux-5.10/drivers/platform/mellanox/
Dmlxreg-io.c48 bool rw_flag, int regsize, u32 *regval) in mlxreg_io_get_reg() argument
52 ret = regmap_read(regmap, data->reg, regval); in mlxreg_io_get_reg()
72 *regval = !!(*regval & ~data->mask); in mlxreg_io_get_reg()
75 *regval &= data->mask; in mlxreg_io_get_reg()
77 *regval |= ~data->mask; in mlxreg_io_get_reg()
83 *regval = ror32(*regval & data->mask, (data->bit - 1)); in mlxreg_io_get_reg()
88 *regval = (*regval & ~data->mask) | in_val; in mlxreg_io_get_reg()
101 *regval |= rol32(val, regsize * i * 8); in mlxreg_io_get_reg()
116 u32 regval = 0; in mlxreg_io_attr_show() local
120 priv->regsize, &regval); in mlxreg_io_attr_show()
[all …]
Dmlxreg-hotplug.c162 u32 regval; in mlxreg_hotplug_attr_show() local
169 ret = regmap_read(priv->regmap, data->reg, &regval); in mlxreg_hotplug_attr_show()
174 regval &= data->mask; in mlxreg_hotplug_attr_show()
178 regval = !(regval & data->mask); in mlxreg_hotplug_attr_show()
180 regval = !!(regval & data->mask); in mlxreg_hotplug_attr_show()
183 return sprintf(buf, "%u\n", regval); in mlxreg_hotplug_attr_show()
195 u32 regval; in mlxreg_hotplug_attr_init() local
210 &regval); in mlxreg_hotplug_attr_init()
214 item->mask = GENMASK((regval & item->mask) - 1, 0); in mlxreg_hotplug_attr_init()
229 data->capability, &regval); in mlxreg_hotplug_attr_init()
[all …]
/kernel/linux/linux-5.10/drivers/scsi/ufs/
Dufs-qcom-ice.c69 u32 regval = qcom_ice_readl(host, QCOM_ICE_REG_VERSION); in qcom_ice_supported() local
70 int major = regval >> 24; in qcom_ice_supported()
71 int minor = (regval >> 16) & 0xFF; in qcom_ice_supported()
72 int step = regval & 0xFFFF; in qcom_ice_supported()
85 regval = qcom_ice_readl(host, QCOM_ICE_REG_FUSE_SETTING); in qcom_ice_supported()
86 if (regval & (QCOM_ICE_FUSE_SETTING_MASK | in qcom_ice_supported()
138 u32 regval; in qcom_ice_low_power_mode_enable() local
140 regval = qcom_ice_readl(host, QCOM_ICE_REG_ADVANCED_CONTROL); in qcom_ice_low_power_mode_enable()
145 regval |= 0x7000; in qcom_ice_low_power_mode_enable()
146 qcom_ice_writel(host, regval, QCOM_ICE_REG_ADVANCED_CONTROL); in qcom_ice_low_power_mode_enable()
[all …]
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
Dclk-hisi-phase.c31 u32 regval) in hisi_phase_regval_to_degrees() argument
36 if (phase->phase_regvals[i] == regval) in hisi_phase_regval_to_degrees()
45 u32 regval; in hisi_clk_get_phase() local
47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
50 return hisi_phase_regval_to_degrees(phase, regval); in hisi_clk_get_phase()
69 int regval; in hisi_clk_set_phase() local
72 regval = hisi_phase_degrees_to_regval(phase, degrees); in hisi_clk_set_phase()
73 if (regval < 0) in hisi_clk_set_phase()
74 return regval; in hisi_clk_set_phase()
[all …]
/kernel/linux/linux-5.10/drivers/regulator/
Dab3100.c162 u8 regval; in ab3100_enable_regulator() local
165 &regval); in ab3100_enable_regulator()
173 if (regval & AB3100_REG_ON_MASK) in ab3100_enable_regulator()
176 regval |= AB3100_REG_ON_MASK; in ab3100_enable_regulator()
179 regval); in ab3100_enable_regulator()
193 u8 regval; in ab3100_disable_regulator() local
211 &regval); in ab3100_disable_regulator()
217 regval &= ~AB3100_REG_ON_MASK; in ab3100_disable_regulator()
219 regval); in ab3100_disable_regulator()
225 u8 regval; in ab3100_is_enabled_regulator() local
[all …]
Dlp8755.c55 unsigned int regval; in lp8755_buck_enable_time() local
58 ret = regmap_read(rdev->regmap, 0x12 + id, &regval); in lp8755_buck_enable_time()
63 return (regval & 0xff) * 100; in lp8755_buck_enable_time()
112 unsigned int regval; in lp8755_buck_get_mode() local
115 ret = regmap_read(rdev->regmap, 0x06, &regval); in lp8755_buck_get_mode()
120 if (regval & (0x01 << id)) in lp8755_buck_get_mode()
123 ret = regmap_read(rdev->regmap, 0x08 + id, &regval); in lp8755_buck_get_mode()
128 if (regval & 0x20) in lp8755_buck_get_mode()
142 unsigned int regval = 0x00; in lp8755_buck_set_ramp() local
148 regval = 0x07; in lp8755_buck_set_ramp()
[all …]
/kernel/linux/linux-5.10/drivers/leds/
Dleds-mlxreg.c65 u32 regval; in mlxreg_led_store_hw() local
81 ret = regmap_read(led_pdata->regmap, data->reg, &regval); in mlxreg_led_store_hw()
87 regval = (regval & data->mask) | nib; in mlxreg_led_store_hw()
89 ret = regmap_write(led_pdata->regmap, data->reg, regval); in mlxreg_led_store_hw()
103 u32 regval; in mlxreg_led_get_hw() local
116 err = regmap_read(led_pdata->regmap, data->reg, &regval); in mlxreg_led_get_hw()
124 regval = regval & ~data->mask; in mlxreg_led_get_hw()
125 regval = (ror32(data->mask, data->bit) == 0xf0) ? ror32(regval, in mlxreg_led_get_hw()
126 data->bit) : ror32(regval, data->bit + 4); in mlxreg_led_get_hw()
127 if (regval >= led_data->base_color && in mlxreg_led_get_hw()
[all …]
/kernel/linux/linux-5.10/drivers/crypto/ccp/
Dccp-debugfs.c47 unsigned int regval; in ccp5_debugfs_info_read() local
63 regval = ioread32(ccp->io_regs + CMD5_PSP_CCP_VERSION); in ccp5_debugfs_info_read()
64 oboff += OSCNPRINTF(" Version: %d\n", regval & RI_VERSION_NUM); in ccp5_debugfs_info_read()
66 if (regval & RI_AES_PRESENT) in ccp5_debugfs_info_read()
68 if (regval & RI_3DES_PRESENT) in ccp5_debugfs_info_read()
70 if (regval & RI_SHA_PRESENT) in ccp5_debugfs_info_read()
72 if (regval & RI_RSA_PRESENT) in ccp5_debugfs_info_read()
74 if (regval & RI_ECC_PRESENT) in ccp5_debugfs_info_read()
76 if (regval & RI_ZDE_PRESENT) in ccp5_debugfs_info_read()
78 if (regval & RI_ZCE_PRESENT) in ccp5_debugfs_info_read()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9002_phy.c381 u32 regval; in ar9002_hw_antdiv_comb_conf_get() local
383 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_antdiv_comb_conf_get()
384 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >> in ar9002_hw_antdiv_comb_conf_get()
386 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >> in ar9002_hw_antdiv_comb_conf_get()
388 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >> in ar9002_hw_antdiv_comb_conf_get()
398 u32 regval; in ar9002_hw_antdiv_comb_conf_set() local
400 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_antdiv_comb_conf_set()
401 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF | in ar9002_hw_antdiv_comb_conf_set()
404 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S) in ar9002_hw_antdiv_comb_conf_set()
406 regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S) in ar9002_hw_antdiv_comb_conf_set()
[all …]
/kernel/linux/linux-5.10/sound/x86/
Dintel_hdmi_lpe_audio.h124 u32 regval; member
148 u32 regval; member
167 u32 regval; member
182 u32 regval; member
192 u32 regval; member
204 u32 regval; member
223 u32 regval; member
236 u32 regval; member
248 u32 regval; member
265 u32 regval; member
[all …]
/kernel/linux/linux-5.10/drivers/edac/
Dsynopsys_edac.c365 u32 regval, clearval = 0; in zynq_get_error_info() local
371 regval = readl(base + STAT_OFST); in zynq_get_error_info()
372 if (!regval) in zynq_get_error_info()
375 p->ce_cnt = (regval & STAT_CECNT_MASK) >> STAT_CECNT_SHIFT; in zynq_get_error_info()
376 p->ue_cnt = regval & STAT_UECNT_MASK; in zynq_get_error_info()
378 regval = readl(base + CE_LOG_OFST); in zynq_get_error_info()
379 if (!(p->ce_cnt && (regval & LOG_VALID))) in zynq_get_error_info()
382 p->ceinfo.bitpos = (regval & CE_LOG_BITPOS_MASK) >> CE_LOG_BITPOS_SHIFT; in zynq_get_error_info()
383 regval = readl(base + CE_ADDR_OFST); in zynq_get_error_info()
384 p->ceinfo.row = (regval & ADDR_ROW_MASK) >> ADDR_ROW_SHIFT; in zynq_get_error_info()
[all …]

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