/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
D | smu_v11_0.h | 235 int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, 238 int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, 242 enum smu_clk_type clk_type, 253 enum smu_clk_type clk_type, 258 enum smu_clk_type clk_type, 262 enum smu_clk_type clk_type, 266 enum smu_clk_type clk_type,
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D | amdgpu_smu.h | 471 int (*print_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf); 472 int (*force_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask); 474 int (*get_od_percentage)(struct smu_context *smu, enum smu_clk_type clk_type); 476 enum smu_clk_type clk_type, 482 enum smu_clk_type clk_type, 594 …int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, u… 595 …int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t m… 686 int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf); 687 int smu_get_od_percentage(struct smu_context *smu, enum smu_clk_type type); 688 int smu_set_od_percentage(struct smu_context *smu, enum smu_clk_type type, uint32_t value); [all …]
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D | smu_v12_0.h | 58 int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
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D | smu_types.h | 188 enum smu_clk_type { enum
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_pp_smu.c | 151 static enum smu_clk_type dc_to_smu_clock_type( in dc_to_smu_clock_type() 154 enum smu_clk_type smu_clk_type = SMU_CLK_COUNT; in dc_to_smu_clock_type() local 158 smu_clk_type = SMU_DISPCLK; in dc_to_smu_clock_type() 161 smu_clk_type = SMU_GFXCLK; in dc_to_smu_clock_type() 164 smu_clk_type = SMU_MCLK; in dc_to_smu_clock_type() 167 smu_clk_type = SMU_DCEFCLK; in dc_to_smu_clock_type() 170 smu_clk_type = SMU_SOCCLK; in dc_to_smu_clock_type() 178 return smu_clk_type; in dc_to_smu_clock_type()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
D | renoir_ppt.c | 177 static int renoir_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type clk_type, in renoir_get_dpm_clk_limited() 245 enum smu_clk_type clk_type, in renoir_get_dpm_ultimate_freq() 348 enum smu_clk_type clk_type, char *buf) in renoir_print_clk_levels() 497 enum smu_clk_type clk_type, in renoir_get_current_clk_freq_by_table() 522 enum smu_clk_type clk_type; in renoir_force_dpm_limit_value() 524 enum smu_clk_type clks[] = { in renoir_force_dpm_limit_value() 549 enum smu_clk_type clk_type; in renoir_unforce_dpm_levels() 552 enum smu_clk_type clk_type; in renoir_unforce_dpm_levels() 695 enum smu_clk_type clk_type, uint32_t mask) in renoir_force_clk_levels()
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D | smu_v12_0.c | 207 int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_v12_0_set_soft_freq_limited_range()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/ |
D | smu_cmn.h | 49 enum smu_clk_type clk_type);
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D | amdgpu_smu.c | 94 enum smu_clk_type clk_type, in smu_set_soft_freq_range() 114 enum smu_clk_type clk_type, in smu_get_dpm_freq_range() 1701 enum smu_clk_type clk_type, in smu_force_clk_levels() 2020 int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) in smu_print_clk_levels() 2037 int smu_get_od_percentage(struct smu_context *smu, enum smu_clk_type type) in smu_get_od_percentage() 2054 int smu_set_od_percentage(struct smu_context *smu, enum smu_clk_type type, uint32_t value) in smu_set_od_percentage() 2344 enum smu_clk_type clk_type, in smu_get_clock_by_type_with_latency()
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D | smu_cmn.c | 293 enum smu_clk_type clk_type) in smu_cmn_clk_dpm_is_enabled()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | smu_v11_0.c | 780 enum smu_clk_type clock_select) in smu_v11_0_get_max_sustainable_clock() 1017 enum smu_clk_type clk_select = 0; in smu_v11_0_display_clock_voltage_request() 1581 int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, in smu_v11_0_get_dpm_ultimate_freq() 1641 enum smu_clk_type clk_type, in smu_v11_0_set_soft_freq_limited_range() 1685 enum smu_clk_type clk_type, in smu_v11_0_set_hard_freq_limited_range() 1842 enum smu_clk_type clk_type, in smu_v11_0_get_dpm_freq_by_index() 1880 enum smu_clk_type clk_type, in smu_v11_0_get_dpm_level_count() 1890 enum smu_clk_type clk_type, in smu_v11_0_set_single_dpm_table() 1928 enum smu_clk_type clk_type, in smu_v11_0_get_dpm_level_range()
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D | navi10_ppt.c | 863 enum smu_clk_type clk_type, in navi10_get_current_clk_freq_by_table() 903 static bool navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) in navi10_is_support_fine_grained_dpm() 934 enum smu_clk_type clk_type, char *buf) in navi10_print_clk_levels() 1113 enum smu_clk_type clk_type, uint32_t mask) in navi10_force_clk_levels() 1250 enum smu_clk_type clk_type, in navi10_get_clock_by_type_with_latency()
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D | sienna_cichlid_ppt.c | 869 enum smu_clk_type clk_type, in sienna_cichlid_get_current_clk_freq_by_table() 919 static bool sienna_cichlid_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type c… in sienna_cichlid_is_support_fine_grained_dpm() 935 enum smu_clk_type clk_type, char *buf) in sienna_cichlid_print_clk_levels() 1034 enum smu_clk_type clk_type, uint32_t mask) in sienna_cichlid_force_clk_levels() 1747 enum smu_clk_type clk_type, in sienna_cichlid_get_dpm_ultimate_freq()
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D | arcturus_ppt.c | 662 enum smu_clk_type clk_type, in arcturus_get_current_clk_freq_by_table() 727 enum smu_clk_type type, char *buf) in arcturus_print_clk_levels() 901 enum smu_clk_type type, uint32_t mask) in arcturus_force_clk_levels()
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