Searched refs:tcr_el1 (Results 1 – 6 of 6) sorted by relevance
/kernel/linux/linux-5.10/tools/testing/selftests/kvm/lib/aarch64/ |
D | processor.c | 240 uint64_t sctlr_el1, tcr_el1; in aarch64_vcpu_setup() local 260 get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1); in aarch64_vcpu_setup() 270 tcr_el1 |= 1ul << 14; /* TG0 = 64KB */ in aarch64_vcpu_setup() 271 tcr_el1 |= 6ul << 32; /* IPS = 52 bits */ in aarch64_vcpu_setup() 274 tcr_el1 |= 0ul << 14; /* TG0 = 4KB */ in aarch64_vcpu_setup() 275 tcr_el1 |= 5ul << 32; /* IPS = 48 bits */ in aarch64_vcpu_setup() 278 tcr_el1 |= 1ul << 14; /* TG0 = 64KB */ in aarch64_vcpu_setup() 279 tcr_el1 |= 5ul << 32; /* IPS = 48 bits */ in aarch64_vcpu_setup() 282 tcr_el1 |= 0ul << 14; /* TG0 = 4KB */ in aarch64_vcpu_setup() 283 tcr_el1 |= 2ul << 32; /* IPS = 40 bits */ in aarch64_vcpu_setup() [all …]
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/kernel/linux/linux-5.10/arch/arm64/include/asm/ |
D | mmu_context.h | 90 tcr = read_sysreg(tcr_el1); in __cpu_set_tcr_t0sz() 93 write_sysreg(tcr, tcr_el1); in __cpu_set_tcr_t0sz()
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/kernel/linux/linux-5.10/arch/arm64/kernel/ |
D | crash_core.c | 16 return (read_sysreg(tcr_el1) & TCR_T1SZ_MASK) >> TCR_T1SZ_OFFSET; in get_tcr_el1_t1sz()
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D | cpufeature.c | 1471 u64 tcr = read_sysreg(tcr_el1) | TCR_HD; in __cpu_enable_hw_dbm() 1473 write_sysreg(tcr, tcr_el1); in __cpu_enable_hw_dbm() 1687 sysreg_clear_set(tcr_el1, 0, TCR_E0PD1); in cpu_enable_e0pd()
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/kernel/linux/linux-5.10/arch/arm64/mm/ |
D | proc.S | 75 mrs x7, tcr_el1 126 mrs x7, tcr_el1 129 msr tcr_el1, x8 500 msr tcr_el1, x10
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/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/nvhe/ |
D | hyp-init.S | 84 mrs x0, tcr_el1
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