| /kernel/linux/linux-5.10/drivers/clk/spear/ |
| D | spear1310_clock.c | 378 static const char *uart_parents[] = { "ras_apb_clk", "gen_syn3_clk", }; variable
947 clk = clk_register_mux(NULL, "uart1_mclk", uart_parents, in spear1310_clk_init()
948 ARRAY_SIZE(uart_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
958 clk = clk_register_mux(NULL, "uart2_mclk", uart_parents, in spear1310_clk_init()
959 ARRAY_SIZE(uart_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
969 clk = clk_register_mux(NULL, "uart3_mclk", uart_parents, in spear1310_clk_init()
970 ARRAY_SIZE(uart_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
980 clk = clk_register_mux(NULL, "uart4_mclk", uart_parents, in spear1310_clk_init()
981 ARRAY_SIZE(uart_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
991 clk = clk_register_mux(NULL, "uart5_mclk", uart_parents, in spear1310_clk_init()
[all …]
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| D | spear6xx_clock.c | 101 static const char *uart_parents[] = { "pll3_clk", "uart_syn_gclk", }; variable
168 clk = clk_register_mux(NULL, "uart_mclk", uart_parents, in spear6xx_clk_init()
169 ARRAY_SIZE(uart_parents), CLK_SET_RATE_NO_REPARENT, in spear6xx_clk_init()
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | clk-mt7629.c | 162 static const char * const uart_parents[] = { variable
505 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
511 MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", uart_parents,
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| D | clk-mt7622.c | 184 static const char * const uart_parents[] = { variable
535 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
541 MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", uart_parents,
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| D | clk-mt8135.c | 225 static const char * const uart_parents[] __initconst = { variable
373 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0150, 24, 2, 31),
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| D | clk-mt6797.c | 157 static const char * const uart_parents[] = { variable
339 MUX_GATE(CLK_TOP_MUX_UART, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
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| D | clk-mt2701.c | 216 static const char * const uart_parents[] = { variable
505 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
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| D | clk-mt6779.c | 354 static const char * const uart_parents[] = { variable
684 MUX_GATE_CLR_SET_UPD(CLK_TOP_UART, "uart_sel", uart_parents,
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| D | clk-mt6765.c | 220 static const char * const uart_parents[] = { variable
399 MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
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| D | clk-mt2712.c | 313 static const char * const uart_parents[] = { variable
757 uart_parents, 0x060, 8, 1, 15),
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| D | clk-mt8183.c | 328 static const char * const uart_parents[] = { variable
571 uart_parents, 0x70,
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| D | clk-mt8173.c | 225 static const char * const uart_parents[] __initconst = { variable
553 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
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| /kernel/linux/linux-5.10/drivers/clk/sprd/ |
| D | sc9860-clk.c | 387 static const char * const uart_parents[] = { "ext-26m", "twpll-48m", variable
389 static SPRD_COMP_CLK(uart0_clk, "uart0", uart_parents, 0x30,
391 static SPRD_COMP_CLK(uart1_clk, "uart1", uart_parents, 0x34,
393 static SPRD_COMP_CLK(uart2_clk, "uart2", uart_parents, 0x38,
395 static SPRD_COMP_CLK(uart3_clk, "uart3", uart_parents, 0x3c,
397 static SPRD_COMP_CLK(uart4_clk, "uart4", uart_parents, 0x40,
611 static SPRD_MUX_CLK(avs_clk, "avs", uart_parents, 0x284,
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