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Searched refs:vdd_dep_on_mclk (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dprocess_pptables_v1_0.c795 pp_table_information->vdd_dep_on_mclk = NULL; in init_clock_voltage_dependency()
814 &pp_table_information->vdd_dep_on_mclk, mclk_dep_table); in init_clock_voltage_dependency()
833 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_mclk) in init_clock_voltage_dependency()
834 && (0 != pp_table_information->vdd_dep_on_mclk->count)) in init_clock_voltage_dependency()
836 pp_table_information->vdd_dep_on_mclk); in init_clock_voltage_dependency()
1117 kfree(pp_table_information->vdd_dep_on_mclk); in pp_tables_v1_0_uninitialize()
1118 pp_table_information->vdd_dep_on_mclk = NULL; in pp_tables_v1_0_uninitialize()
Dvega10_processpptables.c957 pp_table_info->vdd_dep_on_mclk = NULL; in init_powerplay_extended_tables()
1010 &pp_table_info->vdd_dep_on_mclk, in init_powerplay_extended_tables()
1054 pp_table_info->vdd_dep_on_mclk && in init_powerplay_extended_tables()
1055 pp_table_info->vdd_dep_on_mclk->count) in init_powerplay_extended_tables()
1058 pp_table_info->vdd_dep_on_mclk); in init_powerplay_extended_tables()
1239 kfree(pp_table_info->vdd_dep_on_mclk); in vega10_pp_tables_uninitialize()
1240 pp_table_info->vdd_dep_on_mclk = NULL; in vega10_pp_tables_uninitialize()
Dvega10_hwmgr.c333 dep_table[1] = table_info->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
336 od_table[1] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
669 table_info->vdd_dep_on_mclk; in vega10_patch_voltage_dependency_tables_with_lookup_table()
774 table_info->vdd_dep_on_mclk; in vega10_set_private_data_based_on_pptable()
1171 table_info->vdd_dep_on_mclk, in vega10_construct_voltage_tables()
1180 table_info->vdd_dep_on_mclk, in vega10_construct_voltage_tables()
1311 table_info->vdd_dep_on_mclk; in vega10_setup_default_dpm_tables()
1822 &data->odn_dpm_table.vdd_dep_on_mclk; in vega10_populate_single_memory_level()
1824 dep_on_mclk = table_info->vdd_dep_on_mclk; in vega10_populate_single_memory_level()
2519 dep_table = table_info->vdd_dep_on_mclk; in vega10_check_dpm_table_updated()
[all …]
Dsmu10_hwmgr.h202 struct smu10_voltage_dependency_table *vdd_dep_on_mclk; member
Dvega10_hwmgr.h296 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_mclk; member
Dsmu10_hwmgr.c483 smu10_get_clock_voltage_dependency_table(hwmgr, &pinfo->vdd_dep_on_mclk, in smu10_populate_clock_table()
1081 pclk_vol_table = pinfo->vdd_dep_on_mclk; in smu10_get_clock_by_type_with_latency()
1137 pclk_vol_table = pinfo->vdd_dep_on_mclk; in smu10_get_clock_by_type_with_voltage()
Dsmu7_hwmgr.c272 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()
292 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()
819 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_setup_dpm_tables_v1()
886 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_odn_initial_default_setting()
973 dep_table = table_info->vdd_dep_on_mclk; in smu7_check_dpm_table_updated()
1945 table_info->vdd_dep_on_mclk; in smu7_patch_voltage_dependency_tables_with_lookup_table()
2024 phm_ppt_v1_clock_voltage_dependency_table *mclk_table = pptable_info->vdd_dep_on_mclk; in smu7_calc_voltage_dependency_tables()
2167 table_info->vdd_dep_on_mclk; in smu7_set_private_data_based_on_pptable_v1()
2211 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_patch_voltage_workaround()
3323 table_info->vdd_dep_on_mclk; in smu7_get_pp_table_entry_v1()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c992 if (table_info->vdd_dep_on_mclk) { in vegam_populate_single_memory_level()
994 table_info->vdd_dep_on_mclk, clock, in vegam_populate_single_memory_level()
1096 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in vegam_populate_mvdd_value()
1097 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in vegam_populate_mvdd_value()
1102 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in vegam_populate_mvdd_value()
1166 table_info->vdd_dep_on_mclk, in vegam_populate_smc_acpi_level()
1420 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in vegam_populate_smc_initial_state()
1422 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in vegam_populate_smc_initial_state()
Dfiji_smumgr.c1175 vdd_dep_table = table_info->vdd_dep_on_mclk; in fiji_populate_single_memory_level()
1282 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in fiji_populate_mvdd_value()
1283 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in fiji_populate_mvdd_value()
1288 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in fiji_populate_mvdd_value()
1377 table_info->vdd_dep_on_mclk, in fiji_populate_smc_acpi_level()
1650 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in fiji_populate_smc_initailial_state()
1652 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in fiji_populate_smc_initailial_state()
Dpolaris10_smumgr.c1086 vdd_dep_table = table_info->vdd_dep_on_mclk; in polaris10_populate_single_memory_level()
1185 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in polaris10_populate_mvdd_value()
1186 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in polaris10_populate_mvdd_value()
1191 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in polaris10_populate_mvdd_value()
1252 table_info->vdd_dep_on_mclk, in polaris10_populate_smc_acpi_level()
1500 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in polaris10_populate_smc_initailial_state()
1502 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()
Dtonga_smumgr.c980 vdd_dep_table = pptable_info->vdd_dep_on_mclk; in tonga_populate_single_memory_level()
1153 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in tonga_populate_mvdd_value()
1154 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in tonga_populate_mvdd_value()
1162 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in tonga_populate_mvdd_value()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/
Dhwmgr.h535 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member
564 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member