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Searched refs:vmcr (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/
Dvgic-v3-sr.c416 void __vgic_v3_write_vmcr(u32 vmcr) in __vgic_v3_write_vmcr() argument
418 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_vmcr()
437 static int __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, u32 vmcr, in __vgic_v3_highest_priority_lr() argument
453 if (!(val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG0_MASK)) in __vgic_v3_highest_priority_lr()
457 if ((val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG1_MASK)) in __vgic_v3_highest_priority_lr()
528 static unsigned int __vgic_v3_get_bpr0(u32 vmcr) in __vgic_v3_get_bpr0() argument
530 return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT; in __vgic_v3_get_bpr0()
533 static unsigned int __vgic_v3_get_bpr1(u32 vmcr) in __vgic_v3_get_bpr1() argument
537 if (vmcr & ICH_VMCR_CBPR_MASK) { in __vgic_v3_get_bpr1()
538 bpr = __vgic_v3_get_bpr0(vmcr); in __vgic_v3_get_bpr1()
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/kernel/linux/linux-5.10/arch/arm64/kvm/
Dvgic-sys-reg-v3.c18 struct vgic_vmcr vmcr; in access_gic_ctlr() local
21 vgic_get_vmcr(vcpu, &vmcr); in access_gic_ctlr()
60 vmcr.cbpr = (val & ICC_CTLR_EL1_CBPR_MASK) >> ICC_CTLR_EL1_CBPR_SHIFT; in access_gic_ctlr()
61 vmcr.eoim = (val & ICC_CTLR_EL1_EOImode_MASK) >> ICC_CTLR_EL1_EOImode_SHIFT; in access_gic_ctlr()
62 vgic_set_vmcr(vcpu, &vmcr); in access_gic_ctlr()
78 val |= (vmcr.cbpr << ICC_CTLR_EL1_CBPR_SHIFT) & ICC_CTLR_EL1_CBPR_MASK; in access_gic_ctlr()
79 val |= (vmcr.eoim << ICC_CTLR_EL1_EOImode_SHIFT) & ICC_CTLR_EL1_EOImode_MASK; in access_gic_ctlr()
90 struct vgic_vmcr vmcr; in access_gic_pmr() local
92 vgic_get_vmcr(vcpu, &vmcr); in access_gic_pmr()
94 vmcr.pmr = (p->regval & ICC_PMR_EL1_MASK) >> ICC_PMR_EL1_SHIFT; in access_gic_pmr()
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/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
Dvgic-v2.c223 u32 vmcr; in vgic_v2_set_vmcr() local
225 vmcr = (vmcrp->grpen0 << GICH_VMCR_ENABLE_GRP0_SHIFT) & in vgic_v2_set_vmcr()
227 vmcr |= (vmcrp->grpen1 << GICH_VMCR_ENABLE_GRP1_SHIFT) & in vgic_v2_set_vmcr()
229 vmcr |= (vmcrp->ackctl << GICH_VMCR_ACK_CTL_SHIFT) & in vgic_v2_set_vmcr()
231 vmcr |= (vmcrp->fiqen << GICH_VMCR_FIQ_EN_SHIFT) & in vgic_v2_set_vmcr()
233 vmcr |= (vmcrp->cbpr << GICH_VMCR_CBPR_SHIFT) & in vgic_v2_set_vmcr()
235 vmcr |= (vmcrp->eoim << GICH_VMCR_EOI_MODE_SHIFT) & in vgic_v2_set_vmcr()
237 vmcr |= (vmcrp->abpr << GICH_VMCR_ALIAS_BINPOINT_SHIFT) & in vgic_v2_set_vmcr()
239 vmcr |= (vmcrp->bpr << GICH_VMCR_BINPOINT_SHIFT) & in vgic_v2_set_vmcr()
241 vmcr |= ((vmcrp->pmr >> GICV_PMR_PRIORITY_SHIFT) << in vgic_v2_set_vmcr()
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Dvgic-mmio-v2.c267 struct vgic_vmcr vmcr; in vgic_mmio_read_vcpuif() local
270 vgic_get_vmcr(vcpu, &vmcr); in vgic_mmio_read_vcpuif()
274 val = vmcr.grpen0 << GIC_CPU_CTRL_EnableGrp0_SHIFT; in vgic_mmio_read_vcpuif()
275 val |= vmcr.grpen1 << GIC_CPU_CTRL_EnableGrp1_SHIFT; in vgic_mmio_read_vcpuif()
276 val |= vmcr.ackctl << GIC_CPU_CTRL_AckCtl_SHIFT; in vgic_mmio_read_vcpuif()
277 val |= vmcr.fiqen << GIC_CPU_CTRL_FIQEn_SHIFT; in vgic_mmio_read_vcpuif()
278 val |= vmcr.cbpr << GIC_CPU_CTRL_CBPR_SHIFT; in vgic_mmio_read_vcpuif()
279 val |= vmcr.eoim << GIC_CPU_CTRL_EOImodeNS_SHIFT; in vgic_mmio_read_vcpuif()
290 val = (vmcr.pmr & GICV_PMR_PRIORITY_MASK) >> in vgic_mmio_read_vcpuif()
294 val = vmcr.bpr; in vgic_mmio_read_vcpuif()
[all …]
Dvgic-v3.c209 u32 vmcr; in vgic_v3_set_vmcr() local
212 vmcr = (vmcrp->ackctl << ICH_VMCR_ACK_CTL_SHIFT) & in vgic_v3_set_vmcr()
214 vmcr |= (vmcrp->fiqen << ICH_VMCR_FIQ_EN_SHIFT) & in vgic_v3_set_vmcr()
221 vmcr = ICH_VMCR_FIQ_EN_MASK; in vgic_v3_set_vmcr()
224 vmcr |= (vmcrp->cbpr << ICH_VMCR_CBPR_SHIFT) & ICH_VMCR_CBPR_MASK; in vgic_v3_set_vmcr()
225 vmcr |= (vmcrp->eoim << ICH_VMCR_EOIM_SHIFT) & ICH_VMCR_EOIM_MASK; in vgic_v3_set_vmcr()
226 vmcr |= (vmcrp->abpr << ICH_VMCR_BPR1_SHIFT) & ICH_VMCR_BPR1_MASK; in vgic_v3_set_vmcr()
227 vmcr |= (vmcrp->bpr << ICH_VMCR_BPR0_SHIFT) & ICH_VMCR_BPR0_MASK; in vgic_v3_set_vmcr()
228 vmcr |= (vmcrp->pmr << ICH_VMCR_PMR_SHIFT) & ICH_VMCR_PMR_MASK; in vgic_v3_set_vmcr()
229 vmcr |= (vmcrp->grpen0 << ICH_VMCR_ENG0_SHIFT) & ICH_VMCR_ENG0_MASK; in vgic_v3_set_vmcr()
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Dvgic.h186 void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
187 void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
215 void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
216 void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
247 void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
248 void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
Dvgic-mmio.c836 void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) in vgic_set_vmcr() argument
839 vgic_v2_set_vmcr(vcpu, vmcr); in vgic_set_vmcr()
841 vgic_v3_set_vmcr(vcpu, vmcr); in vgic_set_vmcr()
844 void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) in vgic_get_vmcr() argument
847 vgic_v2_get_vmcr(vcpu, vmcr); in vgic_get_vmcr()
849 vgic_v3_get_vmcr(vcpu, vmcr); in vgic_get_vmcr()
Dvgic.c960 struct vgic_vmcr vmcr; in kvm_vgic_vcpu_pending_irq() local
968 vgic_get_vmcr(vcpu, &vmcr); in kvm_vgic_vcpu_pending_irq()
976 irq->priority < vmcr.pmr; in kvm_vgic_vcpu_pending_irq()
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/nvhe/
Dhyp-main.c72 u32 vmcr = host_ctxt->regs.regs[1]; in handle_host_hcall() local
74 __vgic_v3_write_vmcr(vmcr); in handle_host_hcall()
/kernel/linux/linux-5.10/arch/arm64/include/asm/
Dkvm_asm.h199 extern void __vgic_v3_write_vmcr(u32 vmcr);
/kernel/linux/linux-5.10/drivers/video/fbdev/
Dcg14.c131 u32 vmcr; /* VBC Master Control */ member