Searched refs:writer_wm_sets (Results 1 – 8 of 8) sorted by relevance
577 if (ranges->writer_wm_sets[i].wm_inst > 3) in pp_rv_set_wm_ranges()581 ranges->writer_wm_sets[i].wm_inst; in pp_rv_set_wm_ranges()583 ranges->writer_wm_sets[i].max_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()585 ranges->writer_wm_sets[i].min_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()587 ranges->writer_wm_sets[i].max_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()589 ranges->writer_wm_sets[i].min_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()
474 ranges->writer_wm_sets[0].wm_inst = WM_A; in build_watermark_ranges()475 ranges->writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()476 ranges->writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()477 ranges->writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()478 ranges->writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()
1577 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1578 ranges.writer_wm_sets[0].min_fill_clk_mhz = socclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1579 ranges.writer_wm_sets[0].max_fill_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1580 ranges.writer_wm_sets[0].min_drain_clk_mhz = min_fclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1581 ranges.writer_wm_sets[0].max_drain_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1589 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1590 ranges.writer_wm_sets[0].min_fill_clk_mhz = 200; in dcn_bw_notify_pplib_of_wm_ranges()1591 ranges.writer_wm_sets[0].max_fill_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()1592 ranges.writer_wm_sets[0].min_drain_clk_mhz = 800; in dcn_bw_notify_pplib_of_wm_ranges()1593 ranges.writer_wm_sets[0].max_drain_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()[all …]
949 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()951 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()953 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()955 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()958 clock_ranges->writer_wm_sets[i].wm_inst; in renoir_set_watermarks_table()960 clock_ranges->writer_wm_sets[i].wm_type; in renoir_set_watermarks_table()
93 struct pp_smu_wm_set_range writer_wm_sets[MAX_WATERMARK_SETS]; member
1644 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()1646 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()1648 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()1650 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()1653 clock_ranges->writer_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
1475 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1477 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1479 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1481 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1484 clock_ranges->writer_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
3983 ranges.writer_wm_sets[0].wm_inst = 0;3984 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;3985 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;3986 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;3987 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;