Home
last modified time | relevance | path

Searched refs:add (Results 1 – 25 of 7226) sorted by relevance

12345678910>>...290

/third_party/libphonenumber/java/libphonenumber/src/com/google/i18n/phonenumbers/
DShortNumbersRegionCodeSet.java33 regionCodeSet.add("AC"); in getRegionCodeSet()
34 regionCodeSet.add("AD"); in getRegionCodeSet()
35 regionCodeSet.add("AE"); in getRegionCodeSet()
36 regionCodeSet.add("AF"); in getRegionCodeSet()
37 regionCodeSet.add("AG"); in getRegionCodeSet()
38 regionCodeSet.add("AI"); in getRegionCodeSet()
39 regionCodeSet.add("AL"); in getRegionCodeSet()
40 regionCodeSet.add("AM"); in getRegionCodeSet()
41 regionCodeSet.add("AO"); in getRegionCodeSet()
42 regionCodeSet.add("AR"); in getRegionCodeSet()
[all …]
DCountryCodeToRegionCodeMap.java42 listWithRegionCode.add("US"); in getCountryCodeToRegionCodeMap()
43 listWithRegionCode.add("AG"); in getCountryCodeToRegionCodeMap()
44 listWithRegionCode.add("AI"); in getCountryCodeToRegionCodeMap()
45 listWithRegionCode.add("AS"); in getCountryCodeToRegionCodeMap()
46 listWithRegionCode.add("BB"); in getCountryCodeToRegionCodeMap()
47 listWithRegionCode.add("BM"); in getCountryCodeToRegionCodeMap()
48 listWithRegionCode.add("BS"); in getCountryCodeToRegionCodeMap()
49 listWithRegionCode.add("CA"); in getCountryCodeToRegionCodeMap()
50 listWithRegionCode.add("DM"); in getCountryCodeToRegionCodeMap()
51 listWithRegionCode.add("DO"); in getCountryCodeToRegionCodeMap()
[all …]
DAlternateFormatsCountryCodeSet.java33 countryCodeSet.add(7); in getCountryCodeSet()
34 countryCodeSet.add(27); in getCountryCodeSet()
35 countryCodeSet.add(30); in getCountryCodeSet()
36 countryCodeSet.add(31); in getCountryCodeSet()
37 countryCodeSet.add(34); in getCountryCodeSet()
38 countryCodeSet.add(36); in getCountryCodeSet()
39 countryCodeSet.add(39); in getCountryCodeSet()
40 countryCodeSet.add(43); in getCountryCodeSet()
41 countryCodeSet.add(44); in getCountryCodeSet()
42 countryCodeSet.add(49); in getCountryCodeSet()
[all …]
/third_party/python/Lib/test/decimaltestdata/
DdqAdd.decTest32 dqadd001 add 1 1 -> 2
33 dqadd002 add 2 3 -> 5
34 dqadd003 add '5.75' '3.3' -> 9.05
35 dqadd004 add '5' '-3' -> 2
36 dqadd005 add '-5' '-3' -> -8
37 dqadd006 add '-7' '2.5' -> -4.5
38 dqadd007 add '0.7' '0.3' -> 1.0
39 dqadd008 add '1.25' '1.25' -> 2.50
40 dqadd009 add '1.23456789' '1.00000000' -> '2.23456789'
41 dqadd010 add '1.23456789' '1.00000011' -> '2.23456800'
[all …]
DddAdd.decTest32 ddadd001 add 1 1 -> 2
33 ddadd002 add 2 3 -> 5
34 ddadd003 add '5.75' '3.3' -> 9.05
35 ddadd004 add '5' '-3' -> 2
36 ddadd005 add '-5' '-3' -> -8
37 ddadd006 add '-7' '2.5' -> -4.5
38 ddadd007 add '0.7' '0.3' -> 1.0
39 ddadd008 add '1.25' '1.25' -> 2.50
40 ddadd009 add '1.23456789' '1.00000000' -> '2.23456789'
41 ddadd010 add '1.23456789' '1.00000011' -> '2.23456800'
[all …]
Dadd.decTest2 -- add.decTest -- decimal addition --
29 addx001 add 1 1 -> 2
30 addx002 add 2 3 -> 5
31 addx003 add '5.75' '3.3' -> 9.05
32 addx004 add '5' '-3' -> 2
33 addx005 add '-5' '-3' -> -8
34 addx006 add '-7' '2.5' -> -4.5
35 addx007 add '0.7' '0.3' -> 1.0
36 addx008 add '1.25' '1.25' -> 2.50
37 addx009 add '1.23456789' '1.00000000' -> '2.23456789'
[all …]
Drounding.decTest25 -- [We do assume add/minus/plus/subtract are common paths, however, as
43 radx100 add 12345 -0.1 -> 12344 Inexact Rounded
44 radx101 add 12345 -0.01 -> 12344 Inexact Rounded
45 radx102 add 12345 -0.001 -> 12344 Inexact Rounded
46 radx103 add 12345 -0.00001 -> 12344 Inexact Rounded
47 radx104 add 12345 -0.000001 -> 12344 Inexact Rounded
48 radx105 add 12345 -0.0000001 -> 12344 Inexact Rounded
49 radx106 add 12345 0 -> 12345
50 radx107 add 12345 0.0000001 -> 12345 Inexact Rounded
51 radx108 add 12345 0.000001 -> 12345 Inexact Rounded
[all …]
Dinexact.decTest28 inx001 add 1 1 -> 2
29 inx002 add 123456789 0 -> 123456789
30 inx003 add 123456789 0.0 -> 123456789 Rounded
31 inx004 add 123456789 0.00 -> 123456789 Rounded
32 inx005 add 123456789 1 -> 123456790
33 inx006 add 123456789 0.1 -> 123456789 Inexact Rounded
34 inx007 add 123456789 0.01 -> 123456789 Inexact Rounded
35 inx008 add 123456789 0.001 -> 123456789 Inexact Rounded
36 inx009 add 123456789 0.000001 -> 123456789 Inexact Rounded
37 inx010 add 123456789 0.000000001 -> 123456789 Inexact Rounded
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/IPO/
DPassManagerBuilder.cpp252 PM.add(createCFLSteensAAWrapperPass()); in addInitialAliasAnalysisPasses()
255 PM.add(createCFLAndersAAWrapperPass()); in addInitialAliasAnalysisPasses()
258 PM.add(createCFLSteensAAWrapperPass()); in addInitialAliasAnalysisPasses()
259 PM.add(createCFLAndersAAWrapperPass()); in addInitialAliasAnalysisPasses()
268 PM.add(createTypeBasedAAWrapperPass()); in addInitialAliasAnalysisPasses()
269 PM.add(createScopedNoAliasAAWrapperPass()); in addInitialAliasAnalysisPasses()
275 PM.add(createInstructionCombiningPass(ExpensiveCombines)); in addInstructionCombiningPass()
281 FPM.add(createEntryExitInstrumenterPass()); in populateFunctionPassManager()
285 FPM.add(new TargetLibraryInfoWrapperPass(*LibraryInfo)); in populateFunctionPassManager()
291 FPM.add(createCFGSimplificationPass()); in populateFunctionPassManager()
[all …]
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/spirv_assembly/
DvktSpvAsmSpirvVersion1p4Tests.cpp56 void add(const char* basename, const char* description) in add() function
60 …void add(const char* basename, const char* description, const std::vector<std::string>& requiremen… in add() function
156 group.add("different_matrix_layout","different matrix layout"); in createSpirvVersion1p4Group()
157 group.add("different_matrix_strides","different matrix strides"); in createSpirvVersion1p4Group()
158 group.add("nested_arrays_different_inner_stride","nested_arrays_different_inner_stride"); in createSpirvVersion1p4Group()
159 group.add("nested_arrays_different_outer_stride","nested_arrays_different_inner_stride"); in createSpirvVersion1p4Group()
160 group.add("nested_arrays_different_strides","nested_arrays_different_strides"); in createSpirvVersion1p4Group()
161 group.add("same_array_two_ids","same array two ids"); in createSpirvVersion1p4Group()
162 group.add("same_struct_two_ids","same struct two ids"); in createSpirvVersion1p4Group()
163 group.add("ssbo_to_ubo","ssbo_to_ubo"); in createSpirvVersion1p4Group()
[all …]
/third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/spirv_assembly/
DvktSpvAsmSpirvVersion1p4Tests.cpp56 void add(const char* basename, const char* description) in add() function
60 …void add(const char* basename, const char* description, const std::vector<std::string>& requiremen… in add() function
156 group.add("different_matrix_layout","different matrix layout"); in createSpirvVersion1p4Group()
157 group.add("different_matrix_strides","different matrix strides"); in createSpirvVersion1p4Group()
158 group.add("nested_arrays_different_inner_stride","nested_arrays_different_inner_stride"); in createSpirvVersion1p4Group()
159 group.add("nested_arrays_different_outer_stride","nested_arrays_different_inner_stride"); in createSpirvVersion1p4Group()
160 group.add("nested_arrays_different_strides","nested_arrays_different_strides"); in createSpirvVersion1p4Group()
161 group.add("same_array_two_ids","same array two ids"); in createSpirvVersion1p4Group()
162 group.add("same_struct_two_ids","same struct two ids"); in createSpirvVersion1p4Group()
163 group.add("ssbo_to_ubo","ssbo_to_ubo"); in createSpirvVersion1p4Group()
[all …]
/third_party/libcoap/include/coap3/
Dutlist.h314 #define LL_PREPEND(head,add) \ argument
315 LL_PREPEND2(head,add,next)
317 #define LL_PREPEND2(head,add,next) \ argument
319 (add)->next = (head); \
320 (head) = (add); \
338 #define LL_APPEND(head,add) \ argument
339 LL_APPEND2(head,add,next)
341 #define LL_APPEND2(head,add,next) \ argument
344 (add)->next=NULL; \
348 _tmp->next=(add); \
[all …]
/third_party/openssl/Configurations/
D10-main.conf203 lflags => add("-Wl,-map"),
213 ex_libs => add("-lsocket -lnsl -ldl"),
242 cflags => add(threads("-pthread")),
243 lib_cppflags => add("-DL_ENDIAN"),
244 ex_libs => add(threads("-pthread")),
266 lib_cppflags => add("-DL_ENDIAN"),
267 ex_libs => add(threads("-pthread")),
295 cppflags => add(threads("-D_REENTRANT")),
296 lib_cppflags => add("-DL_ENDIAN"),
298 lflags => add(threads("-mt")),
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen6/
Dadd.asm1 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H };
2 add(16) g4<1>UW g1.4<2,4,0>UW 0x10101010V { align1 1H };
3 add(8) g30<1>F g26<8,8,1>F -g4.4<0,1,0>F { align1 1Q };
4 add(16) g18<1>F g8<8,8,1>F -g6.4<0,1,0>F { align1 1H };
5 add(1) m22.4<1>D g39.4<0,1,0>D 1D { align1 WE_all 1N };
6 add(8) m1<1>D g3.3<0,1,0>D g2<0,1,0>D { align1 1Q };
7 add(16) m1<1>D g3.3<0,1,0>D g2<0,1,0>D { align1 1H };
8 add(8) g11<1>.xyF g1<0>.xyyyF g2<0>.xF { align16 1Q };
9 add(8) m6<1>F g4<8,8,1>F 0xbd4ccccdF /* -0.05F */ { align1 1Q };
10 add(8) g2<1>F g4<8,8,1>F 0x3d4ccccdF /* 0.05F */ { align1 1Q };
[all …]
/third_party/elfutils/tests/
Dtestfile45.expect.bz2
/third_party/mesa3d/src/intel/tools/tests/gen7.5/
Dadd.asm1 add(8) g124<1>F g9<8,8,1>D 1D { align1 1Q };
2 add(16) g120<1>F g15<8,8,1>D 1D { align1 1H };
3 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H };
4 add(16) g4<1>UW g1.4<2,4,0>UW 0x10101010V { align1 1H };
5 add(1) g11.4<1>UD g11<0,1,0>UD 0x00000001UD { align1 1N };
6 add(8) g17<1>F g6<0>F g7.4<0>F { align16 1Q };
7 add(1) a0<1>UW g11<0,1,0>UW 0x0008UW { align1 WE_all 1N };
8 add(8) g14<1>D g12<4>D -g1.4<0>D { align16 1Q };
9 add(8) g3<1>F g18<4>F 0x3e800000F /* 0.25F */ { align16 1Q };
10 add(1) g126.4<1>D g39.4<0,1,0>D 1D { align1 WE_all 1N };
[all …]
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/subgroups/
DvktSubgroupUniformControlFlowTests.cpp65 …void add(const char* basename, const char* description, bool small_workgroups, bool use_subgroup_s… in add() function
247 group.add("subgroup_reconverge00", "if/else diverge", small, control, stage); in createSubgroupUniformControlFlowTests()
248 group.add("subgroup_reconverge01", "do while diverge", small, control, stage); in createSubgroupUniformControlFlowTests()
249 group.add("subgroup_reconverge02", "while true with break", small, control, stage); in createSubgroupUniformControlFlowTests()
250 group.add("subgroup_reconverge03", "if/else diverge, volatile", small, control, stage); in createSubgroupUniformControlFlowTests()
251 group.add("subgroup_reconverge04", "early return and if/else diverge", small, control, stage); in createSubgroupUniformControlFlowTests()
252 group.add("subgroup_reconverge05", "early return and if/else volatile", small, control, stage); in createSubgroupUniformControlFlowTests()
253 …group.add("subgroup_reconverge06", "while true with volatile conditional break and early return", … in createSubgroupUniformControlFlowTests()
254 group.add("subgroup_reconverge07", "while true return and break", small, control, stage); in createSubgroupUniformControlFlowTests()
255 …group.add("subgroup_reconverge08", "for loop atomics with conditional break", small, control, stag… in createSubgroupUniformControlFlowTests()
[all …]
/third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/subgroups/
DvktSubgroupUniformControlFlowTests.cpp65 …void add(const char* basename, const char* description, bool small_workgroups, bool use_subgroup_s… in add() function
247 group.add("subgroup_reconverge00", "if/else diverge", small, control, stage); in createSubgroupUniformControlFlowTests()
248 group.add("subgroup_reconverge01", "do while diverge", small, control, stage); in createSubgroupUniformControlFlowTests()
249 group.add("subgroup_reconverge02", "while true with break", small, control, stage); in createSubgroupUniformControlFlowTests()
250 group.add("subgroup_reconverge03", "if/else diverge, volatile", small, control, stage); in createSubgroupUniformControlFlowTests()
251 group.add("subgroup_reconverge04", "early return and if/else diverge", small, control, stage); in createSubgroupUniformControlFlowTests()
252 group.add("subgroup_reconverge05", "early return and if/else volatile", small, control, stage); in createSubgroupUniformControlFlowTests()
253 …group.add("subgroup_reconverge06", "while true with volatile conditional break and early return", … in createSubgroupUniformControlFlowTests()
254 group.add("subgroup_reconverge07", "while true return and break", small, control, stage); in createSubgroupUniformControlFlowTests()
255 …group.add("subgroup_reconverge08", "for loop atomics with conditional break", small, control, stag… in createSubgroupUniformControlFlowTests()
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen4.5/
Dadd.asm1 add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
2 add(8) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 };
3 add(8) g8<1>F g10.8<8,8,1>UW -g1<0,1,0>F { align1 sechalf };
4 add(16) g4<1>F g18<8,8,1>F g6<8,8,1>F { align1 compr };
5 add(1) m14.4<1>D g8.4<0,1,0>D 16D { align1 nomask };
6 add(8) g5<1>.xD g2<4>.xD 64D { align16 };
7 add(8) g4<1>.xD g5<4>.xD g4<4>.xD { align16 };
8 add(8) g3<1>F g3<4>F g5<4>F { align16 };
9 add(16) g24<1>F g20<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
10 add(16) g14<1>D g14<8,8,1>D 1D { align1 compr };
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen5/
Dadd.asm1 add(8) g2<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
2 add(8) g8<1>F g2<8,8,1>UW -g1<0,1,0>F { align1 };
3 add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
4 add(8) g8<1>F g10.8<8,8,1>UW -g1<0,1,0>F { align1 sechalf };
5 add(8) g2<1>F g2<8,8,1>F g6.7<0,1,0>F { align1 };
6 add(16) g4<1>F g10<8,8,1>F g6.7<0,1,0>F { align1 compr };
7 add(8) g5<1>.xD g2<4>.xD 64D { align16 };
8 add(8) g4<1>.xD g5<4>.xD g4<4>.xD { align16 };
9 add(8) g3<1>F g3<4>F g5<4>F { align16 };
10 add(8) g14<1>F g6<8,8,1>F 0x3f800000F /* 1F */ { align1 };
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen4/
Dadd.asm1 add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
2 add(16) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 compr };
3 add(16) g4<1>F g18<8,8,1>F g6<8,8,1>F { align1 compr };
4 add(1) m14.4<1>D g8.4<0,1,0>D 16D { align1 nomask };
5 add(8) g5<1>.xD g2<4>.xD 64D { align16 };
6 add(8) g4<1>.xD g5<4>.xD g4<4>.xD { align16 };
7 add(8) g3<1>F g3<4>F g5<4>F { align16 };
8 add(16) g24<1>F g20<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
9 add(16) g14<1>D g14<8,8,1>D 1D { align1 compr };
10 add(8) m5<1>.xyzF g10<4>.xyzzF g8<4>.xyzzF { align16 NoDDClr };
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen7/
Dadd.asm1 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H };
2 add(16) g4<1>UW g1.4<2,4,0>UW 0x10101010V { align1 1H };
3 add(1) g11.4<1>UD g11<0,1,0>UD 0x00000001UD { align1 1N };
4 add(8) g17<1>F g6<0>F g7.4<0>F { align16 1Q };
5 add(1) a0<1>UW g11<0,1,0>UW 0x0008UW { align1 WE_all 1N };
6 add(8) g46<1>F g42<8,8,1>F -g4.4<0,1,0>F { align1 1Q };
7 add(16) g19<1>F g11<8,8,1>F -g6.4<0,1,0>F { align1 1H };
8 add(1) g126.4<1>D g39.4<0,1,0>D 1D { align1 WE_all 1N };
9 add(8) g124<1>D g3.3<0,1,0>D g2<0,1,0>D { align1 1Q };
10 add(16) g120<1>D g3.3<0,1,0>D g2<0,1,0>D { align1 1H };
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen9/
Dadd.asm1 add(8) g124<1>F g7<8,8,1>D 1D { align1 1Q };
2 add(16) g120<1>F g11<8,8,1>D 1D { align1 1H };
3 add(16) g4<1>F g1<0,1,0>F -g1.4<0,1,0>F { align1 1H };
4 add(8) g3.8<1>UW g3<8,8,1>UW 0x0008UW { align1 WE_all 1Q };
5 add(16) g3<1>D g18<8,8,1>D g12<8,8,1>D { align1 1H };
6 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H };
7 add(32) g10<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all };
8 add(8) g2<1>D g96<8,8,1>D -1023D { align1 1Q };
9 add(8) g4<1>F g5.6<0,1,0>F g7.2<0,1,0>F { align1 1Q };
10 add(8) g53<1>DF g49<4,4,1>DF g51<4,4,1>DF { align1 1Q };
[all …]
/third_party/mesa3d/src/intel/tools/tests/gen8/
Dadd.asm1 add(8) g124<1>F g7<8,8,1>D 1D { align1 1Q };
2 add(16) g120<1>F g11<8,8,1>D 1D { align1 1H };
3 add(16) g11<1>F g1<0,1,0>F -g1.4<0,1,0>F { align1 1H };
4 add(8) g10.8<1>UW g10<8,8,1>UW 0x0008UW { align1 WE_all 1Q };
5 add(16) g14<1>D g25<8,8,1>D g19<8,8,1>D { align1 1H };
6 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H };
7 add(32) g18<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all };
8 add(8) g2<1>D g34<8,8,1>D -1023D { align1 1Q };
9 add(8) g4<1>F g5.6<0,1,0>F g7.2<0,1,0>F { align1 1Q };
10 add(8) g53<1>DF g49<4,4,1>DF g51<4,4,1>DF { align1 1Q };
[all …]
/third_party/libphonenumber/java/libphonenumber/test/com/google/i18n/phonenumbers/
DCountryCodeToRegionCodeMapForTesting.java42 listWithRegionCode.add("US"); in getCountryCodeToRegionCodeMap()
43 listWithRegionCode.add("BB"); in getCountryCodeToRegionCodeMap()
44 listWithRegionCode.add("BS"); in getCountryCodeToRegionCodeMap()
45 listWithRegionCode.add("CA"); in getCountryCodeToRegionCodeMap()
49 listWithRegionCode.add("RU"); in getCountryCodeToRegionCodeMap()
53 listWithRegionCode.add("FR"); in getCountryCodeToRegionCodeMap()
57 listWithRegionCode.add("IT"); in getCountryCodeToRegionCodeMap()
61 listWithRegionCode.add("GB"); in getCountryCodeToRegionCodeMap()
62 listWithRegionCode.add("GG"); in getCountryCodeToRegionCodeMap()
66 listWithRegionCode.add("SE"); in getCountryCodeToRegionCodeMap()
[all …]

12345678910>>...290