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Searched refs:ADDR_SW_256KB_Z_X (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/amd/addrlib/src/gfx11/
Dgfx11addrlib.h90 const UINT_32 Gfx11Blk256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) |
96 (1u << ADDR_SW_256KB_Z_X);
155 const UINT_32 Gfx11Rsrc3dThin256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) |
Dgfx11addrlib.cpp169 (pIn->swizzleMode != ADDR_SW_256KB_Z_X) && in HwlComputeHtileInfo()
3595 … ADDR_ASSERT((swizzleMode == ADDR_SW_256KB_Z_X) || (swizzleMode == ADDR_SW_256KB_R_X)); in GetSwizzlePatternInfo()
4009 ADDR_SW_256KB_Z_X, in HwlComputeMaxMetaBaseAlignments()
/third_party/mesa3d/src/amd/addrlib/inc/
Daddrtypes.h289 ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28, enumerator
/third_party/mesa3d/src/amd/common/
Dac_surface_modifier_test.c261 unsigned block_size_bits = surf.u.gfx9.swizzle_mode >= ADDR_SW_256KB_Z_X ? 18 : 16; in test_modifier()
Dac_surface_meta_address_test.c512 swizzle_modes[num_swizzle_modes++] = ADDR_SW_256KB_Z_X; in run_htile_address_test()
Dac_surface.c1514 sw_mode == ADDR_SW_256KB_Z_X || sw_mode == ADDR_SW_256KB_R_X; in is_dcc_supported_by_CB()
2476 case ADDR_SW_256KB_Z_X: in gfx9_compute_surface()
2882 case ADDR_SW_256KB_Z_X: in ac_surface_get_gfx9_pitch_align()