Searched refs:ADDR_TM_1D_TILED_THIN1 (Results 1 – 6 of 6) sorted by relevance
753 localIn.tileMode = ADDR_TM_1D_TILED_THIN1; in HwlComputeSurfaceInfo()1060 tileMode = ADDR_TM_1D_TILED_THIN1; in HwlOverrideTileMode()1373 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()1389 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()1408 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()1460 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()
176 case ADDR_TM_1D_TILED_THIN1://fall through in DispatchComputeSurfaceInfo()615 return ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, ADDR_TM_1D_TILED_THIN1); in ComputeSurfaceInfoMacroTiled()1139 expTileMode = ADDR_TM_1D_TILED_THIN1; in ComputeSurfaceMipLevelTileMode()1248 expTileMode = ADDR_TM_1D_TILED_THIN1; in HwlDegradeThickTileMode()1371 case ADDR_TM_1D_TILED_THIN1://fall through in DispatchComputeSurfaceAddrFromCoord()2233 case ADDR_TM_1D_TILED_THIN1://fall through in DispatchComputeSurfaceCoordFromAddr()
3344 tileMode = ADDR_TM_1D_TILED_THIN1; in HwlOptimizeTileMode()
182 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles enumerator
3660 ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in OptimizeTileMode()3706 ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in OptimizeTileMode()3724 ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in OptimizeTileMode()3740 pInOut->tileMode = ADDR_TM_1D_TILED_THIN1; in OptimizeTileMode()
704 case ADDR_TM_1D_TILED_THIN1: in gfx6_compute_level()1063 AddrSurfInfoIn.tileMode = ADDR_TM_1D_TILED_THIN1; in gfx6_compute_surface()