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Searched refs:ARC (Results 1 – 25 of 85) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCFrameLowering.cpp66 AdjOp = Positive ? ARC::ADD_rru6 : ARC::SUB_rru6; in generateStackAdjustment()
68 AdjOp = Positive ? ARC::ADD_rrs12 : ARC::SUB_rrs12; in generateStackAdjustment()
70 AdjOp = Positive ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in generateStackAdjustment()
81 assert(Reg.getReg() >= ARC::R13 && Reg.getReg() <= ARC::R25 && in determineLastCalleeSave()
94 SavedRegs.set(ARC::BLINK); in determineCalleeSaves()
110 ScalarAlloc, ARC::SP); in adjustStackToMatchRecords()
138 unsigned Opc = ARC::SUB_rrlimm; in emitPrologue()
140 Opc = ARC::SUB_rru6; in emitPrologue()
142 Opc = ARC::SUB_rrs12; in emitPrologue()
143 BuildMI(MBB, MBBI, dl, TII->get(Opc), ARC::SP) in emitPrologue()
[all …]
DARCRegisterInfo.cpp48 if (MI.getOpcode() == ARC::LD_rs9 && (Offset >= 256 || Offset < -256)) { in ReplaceFrameIndex()
50 BuildMI(MBB, II, dl, TII.get(ARC::LD_rlimm), Reg) in ReplaceFrameIndex()
58 if (MI.getOpcode() != ARC::GETFI && (Offset >= 256 || Offset < -256)) { in ReplaceFrameIndex()
60 BaseReg = RS->FindUnusedReg(&ARC::GPR32RegClass); in ReplaceFrameIndex()
66 BaseReg = RS->scavengeRegister(&ARC::GPR32RegClass, II, SPAdj); in ReplaceFrameIndex()
74 unsigned AddOpc = isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ReplaceFrameIndex()
83 case ARC::LD_rs9: in ReplaceFrameIndex()
86 case ARC::LDH_rs9: in ReplaceFrameIndex()
87 case ARC::LDH_X_rs9: in ReplaceFrameIndex()
90 case ARC::LDB_rs9: in ReplaceFrameIndex()
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DARCExpandPseudos.cpp48 case ARC::ST_FAR: in getMappedOp()
49 return ARC::ST_rs9; in getMappedOp()
50 case ARC::STH_FAR: in getMappedOp()
51 return ARC::STH_rs9; in getMappedOp()
52 case ARC::STB_FAR: in getMappedOp()
53 return ARC::STB_rs9; in getMappedOp()
62 unsigned AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in ExpandStore()
64 isUInt<6>(SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ExpandStore()
85 case ARC::ST_FAR: in runOnMachineFunction()
86 case ARC::STH_FAR: in runOnMachineFunction()
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DARCInstrInfo.cpp47 : ARCGenInstrInfo(ARC::ADJCALLSTACKDOWN, ARC::ADJCALLSTACKUP), RI() {} in ARCInstrInfo()
54 return Opcode == ARC::LD_rs9 || Opcode == ARC::LDH_rs9 || in isLoad()
55 Opcode == ARC::LDB_rs9; in isLoad()
59 return Opcode == ARC::ST_rs9 || Opcode == ARC::STH_rs9 || in isStore()
60 Opcode == ARC::STB_rs9; in isStore()
137 static bool isUncondBranchOpcode(int Opc) { return Opc == ARC::BR; } in isUncondBranchOpcode()
140 return Opc == ARC::BRcc_rr_p || Opc == ARC::BRcc_ru6_p; in isCondBranchOpcode()
143 static bool isJumpOpcode(int Opc) { return Opc == ARC::J; } in isJumpOpcode()
285 assert(ARC::GPR32RegClass.contains(SrcReg) && in copyPhysReg()
287 assert(ARC::GPR32RegClass.contains(DestReg) && in copyPhysReg()
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DARCBranchFinalize.cpp96 return !(MI->getOpcode() != ARC::BRcc_rr_p && in isBRccPseudo()
97 MI->getOpcode() != ARC::BRcc_ru6_p); in isBRccPseudo()
102 if (MI->getOpcode() == ARC::BRcc_rr_p) in getBRccForPseudo()
103 return ARC::BRcc_rr; in getBRccForPseudo()
104 return ARC::BRcc_ru6; in getBRccForPseudo()
109 if (MI->getOpcode() == ARC::BRcc_rr_p) in getCmpForPseudo()
110 return ARC::CMP_rr; in getCmpForPseudo()
111 return ARC::CMP_ru6; in getCmpForPseudo()
137 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(ARC::Bcc)) in replaceWithCmpBcc()
DLLVMBuild.txt1 ;===- ./lib/Target/ARC/LLVMBuild.txt -------------------------*- Conf -*--===;
22 name = ARC
30 parent = ARC
43 add_to_library_groups = ARC
DARCRegisterInfo.td1 //===- ARCRegisterInfo.td - ARC Register defs --------------*- tablegen -*-===//
10 // Declarations that describe the ARC register file
15 let Namespace = "ARC";
70 def GPR32: RegisterClass<"ARC", [i32], 32,
75 def SREG : RegisterClass<"ARC", [i32], 1, (add STATUS32)>;
77 def GPR_S : RegisterClass<"ARC", [i32], 8,
DARCCallingConv.td1 //===- ARCCallingConv.td - Calling Conventions for ARC -----*- tablegen -*-===//
8 // This describes the calling conventions for ARC architecture.
12 // ARC Return Value Calling Convention
25 // ARC Argument Calling Conventions
DARC.td1 //===- ARC.td - Describe the ARC Target Machine ------------*- tablegen -*-===//
22 def ARC : Target {
DARCISelLowering.cpp76 addRegisterClass(MVT::i32, &ARC::GPR32RegClass); in ARCTargetLowering()
81 setStackPointerRegisterToSaveRestore(ARC::SP); in ARCTargetLowering()
290 StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, in LowerCall()
400 SDValue StackPtr = DAG.getRegister(ARC::SP, MVT::i32); in lowerCallResult()
493 unsigned VReg = RegInfo.createVirtualRegister(&ARC::GPR32RegClass); in LowerCallArguments()
521 static const MCPhysReg ArgRegs[] = {ARC::R0, ARC::R1, ARC::R2, ARC::R3, in LowerCallArguments()
522 ARC::R4, ARC::R5, ARC::R6, ARC::R7}; in LowerCallArguments()
538 unsigned VReg = RegInfo.createVirtualRegister(&ARC::GPR32RegClass); in LowerCallArguments()
DARCISelDAGToDAG.cpp54 Reg = CurDAG->getRegister(ARC::STATUS32, MVT::i32); in SelectCMOVPred()
174 isInt<12>(CVal) ? ARC::MOV_rs12 : ARC::MOV_rlimm, in Select()
DARCOptAddrMode.cpp126 case ARC::SUB_rru6: in isAddConstantOp()
129 case ARC::ADD_rru6: in isAddConstantOp()
253 int NewOpcode = ARC::getPostIncOpcode(Ldst.getOpcode()); in tryToCombine()
475 if (ARC::getPostIncOpcode(MI->getOpcode()) < 0) in processBasicBlock()
DARCAsmPrinter.cpp54 case ARC::DBG_VALUE: in EmitInstruction()
DCMakeLists.txt1 set(LLVM_TARGET_DEFINITIONS ARC.td)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/Disassembler/
DARCDisassembler.cpp114 ARC::R0, ARC::R1, ARC::R2, ARC::R3, ARC::R4, ARC::R5, ARC::R6,
115 ARC::R7, ARC::R8, ARC::R9, ARC::R10, ARC::R11, ARC::R12, ARC::R13,
116 ARC::R14, ARC::R15, ARC::R16, ARC::R17, ARC::R18, ARC::R19, ARC::R20,
117 ARC::R21, ARC::R22, ARC::R23, ARC::R24, ARC::R25, ARC::GP, ARC::FP,
118 ARC::SP, ARC::ILINK, ARC::R30, ARC::BLINK};
DLLVMBuild.txt1 ;===- ./lib/Target/ARC/Disassembler/LLVMBuild.txt ------------*- Conf -*--===;
20 parent = ARC
22 add_to_library_groups = ARC
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/TargetInfo/
DLLVMBuild.txt1 ;===- ./lib/Target/ARC/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===;
20 parent = ARC
22 add_to_library_groups = ARC
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/MCTargetDesc/
DLLVMBuild.txt1 ;===- ./lib/Target/ARC/MCTargetDesc/LLVMBuild.txt ------------*- Conf -*--===;
20 parent = ARC
22 add_to_library_groups = ARC
DARCMCTargetDesc.cpp45 InitARCMCRegisterInfo(X, ARC::BLINK); in createARCMCRegisterInfo()
60 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, ARC::SP, 0); in createARCMCAsmInfo()
/third_party/jerryscript/targets/curie_bsp/
DREADME.md98 ARC Core state: 0000400
101 6307|ARC|MAIN| INFO| BSP init done
102 6315|ARC| CFW| INFO| ADC service init in progress..
103 6315|ARC| CFW| INFO| GPIO service init in progress...
104 6315|ARC| CFW| INFO| GPIO service init in progress...
105 6315|ARC|MAIN| INFO| CFW init done
/third_party/protobuf/objectivec/Tests/
DGPBARCUnittestProtos.m2 #error "This file requires ARC support."
35 // Makes sure all the generated headers compile with ARC on.
/third_party/python/Lib/tkinter/
Dconstants.py97 ARC='arc' variable
/third_party/protobuf/objectivec/
DREADME.md17 - The library code does *not* use ARC (for performance reasons), but it all can
18 be called from ARC code.
47 If the target is using ARC, remember to turn off ARC (`-fno-objc-arc`) for the
/third_party/toybox/www/
D0bsd-mckusick.txt13 ARC-Seal: i=1; a=rsa-sha256; t=1539798983; cv=none;
21 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
31 ARC-Authentication-Results: i=1; mx.google.com;
/third_party/flutter/engine/flutter/shell/platform/darwin/ios/framework/Source/
DFlutterBinaryMessengerRelayTest.mm14 #error ARC must be enabled!

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