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Searched refs:BRW_SWIZZLE_XYZW (Results 1 – 12 of 12) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_reg.h79 #define BRW_SWIZZLE_XYZW BRW_SWIZZLE4(0,1,2,3) macro
97 #define BRW_SWZ_COMP_INPUT(comp) (BRW_SWIZZLE_XYZW >> ((comp)*2))
98 #define BRW_SWZ_COMP_OUTPUT(comp) (BRW_SWIZZLE_XYZW << ((comp)*2))
455 BRW_SWIZZLE_XYZW, in brw_vec16_reg()
472 BRW_SWIZZLE_XYZW, in brw_vec8_reg()
489 BRW_SWIZZLE_XYZW, in brw_vec4_reg()
858 BRW_SWIZZLE_XYZW, /* NOTE! */ in brw_ip_reg()
Dbrw_vec4_copy_propagation.cpp105 src.swizzle = BRW_SWIZZLE_XYZW; in get_copy_value()
358 if ((value.file == UNIFORM || value.swizzle != BRW_SWIZZLE_XYZW) && in try_copy_propagate()
382 if (is_align1_opcode(inst->opcode) && composed_swizzle != BRW_SWIZZLE_XYZW) in try_copy_propagate()
Dbrw_vec4_tcs.cpp290 unsigned swiz = BRW_SWIZZLE_XYZW; in nir_emit_intrinsic()
297 assert(swiz == BRW_SWIZZLE_XYZW); in nir_emit_intrinsic()
Dtest_vec4_register_coalesce.cpp175 src.swizzle = BRW_SWIZZLE_XYZW; in TEST_F()
Dbrw_vec4_cmod_propagation.cpp45 later->src[0].swizzle != BRW_SWIZZLE_XYZW) || in writemasks_incompatible()
Dbrw_vec4.cpp58 this->swizzle = BRW_SWIZZLE_XYZW; in src_reg()
855 if (devinfo->ver == 6 && is_math() && swizzle != BRW_SWIZZLE_XYZW) in can_reswizzle()
1658 BRW_SWIZZLE_XYZW, in get_timestamp()
2125 case BRW_SWIZZLE_XYZW: in is_supported_64bit_region()
Dbrw_vec4_reg_allocate.cpp491 temp.swizzle = BRW_SWIZZLE_XYZW; in spill_reg()
Dbrw_fs_copy_propagation.cpp696 assert(entry->src.swizzle == BRW_SWIZZLE_XYZW); in try_copy_propagate()
Dbrw_disasm.c1111 } else if (swiz != BRW_SWIZZLE_XYZW) { in src_swizzle()
Dbrw_vec4_generator.cpp51 assert(src.swizzle == BRW_SWIZZLE_XYZW); in check_gfx6_math_src_arg()
Dbrw_vec4_nir.cpp2371 if (src.swizzle != BRW_SWIZZLE_XYZW) { in shuffle_64bit_data()
Dbrw_fs.cpp3357 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in emit_repclear_shader()