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Searched refs:Cycles (Results 1 – 25 of 38) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
46 VisitedBBInfo() : HasReturn(false), Cycles(0) {} in VisitedBBInfo()
47 VisitedBBInfo(bool HasReturn, unsigned int Cycles) in VisitedBBInfo()
48 : HasReturn(HasReturn), Cycles(Cycles) {} in VisitedBBInfo()
75 unsigned int Cycles = 0);
78 unsigned int &Cycles);
134 unsigned Cycles = I->second; in runOnMachineFunction() local
141 if (Cycles < Threshold) { in runOnMachineFunction()
153 addPadding(MBB, ReturnLoc, Threshold - Cycles); in runOnMachineFunction()
164 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) { in findReturns() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DInstruction.cpp22 unsigned Cycles) { in writeStartEvent() argument
25 CRD.Cycles = Cycles; in writeStartEvent()
26 DependentWriteCyclesLeft = Cycles; in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { in writeStartEvent() argument
40 if (TotalCycles < Cycles) { in writeStartEvent()
43 CRD.Cycles = Cycles; in writeStartEvent()
44 TotalCycles = Cycles; in writeStartEvent()
139 if (CriticalRegDep.Cycles) in computeCriticalRegDep()
145 if (WriteCRD.Cycles > MaxLatency) in computeCriticalRegDep()
151 if (ReadCRD.Cycles > MaxLatency) in computeCriticalRegDep()
DPipeline.cpp45 ++Cycles; in run()
48 return Cycles; in run()
86 LLVM_DEBUG(dbgs() << "\n[E] Cycle begin: " << Cycles << '\n'); in notifyCycleBegin()
92 LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n"); in notifyCycleEnd()
DInstrBuilder.cpp68 if (!PRE->Cycles) { in initializeUsedResources()
88 CycleSegment RCy(0, PRE->Cycles, false); in initializeUsedResources()
92 SuperResources[Super] += PRE->Cycles; in initializeUsedResources()
321 WLE.Cycles < 0 ? ID.MaxLatency : static_cast<unsigned>(WLE.Cycles); in populateWrites()
349 WLE.Cycles < 0 ? ID.MaxLatency : static_cast<unsigned>(WLE.Cycles); in populateWrites()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCSchedule.h66 uint16_t Cycles; member
69 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
79 int16_t Cycles; member
83 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
98 int Cycles; member
102 && Cycles == Other.Cycles;
DMCSubtargetInfo.h190 return I->Cycles; in getReadAdvanceCycles()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCSchedule.cpp49 if (WLEntry->Cycles < 0) in computeInstrLatency()
50 return WLEntry->Cycles; in computeInstrLatency()
51 Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles)); in computeInstrLatency()
95 if (!I->Cycles) in getReciprocalThroughput()
98 double Temp = NumUnits * 1.0 / I->Cycles; in getReciprocalThroughput()
163 DelayCycles = std::min(DelayCycles, E.Cycles); in getForwardingDelayCycles()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/HardwareUnits/
DLSUnit.h107 unsigned Cycles = IR.getInstruction()->getCyclesLeft(); in onGroupIssued() local
108 if (CriticalPredecessor.Cycles < Cycles) { in onGroupIssued()
110 CriticalPredecessor.Cycles = Cycles; in onGroupIssued()
161 if (isWaiting() && CriticalPredecessor.Cycles) in cycleEvent()
162 CriticalPredecessor.Cycles--; in cycleEvent()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/
DInstruction.h90 unsigned Cycles; member
204 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
276 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
320 void subtract(unsigned Cycles) { in subtract() argument
321 assert(End >= Cycles); in subtract()
322 End -= Cycles; in subtract()
340 ResourceUsage(CycleSegment Cycles, unsigned Units = 1)
341 : CS(Cycles), NumUnits(Units) {} in CS()
DPipeline.h59 unsigned Cycles; variable
67 Pipeline() : Cycles(0) {} in Pipeline()
DSupport.h55 ResourceCycles(unsigned Cycles, unsigned ResourceUnits = 1)
56 : Numerator(Cycles), Denominator(ResourceUnits) {} in Numerator() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/
DInstructionTables.cpp32 unsigned Cycles = Resource.second.size(); in execute() local
42 std::make_pair(ResourceUnit, ResourceCycles(Cycles, NumUnits))); in execute()
57 ResourceUnit, ResourceCycles(Cycles, NumUnits * SubUnit.NumUnits))); in execute()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSchedule.cpp126 static unsigned capLatency(int Cycles) { in capLatency() argument
127 return Cycles >= 0 ? Cycles : 1000; in capLatency()
224 unsigned Latency = capLatency(WLEntry->Cycles); in computeOperandLatency()
DMachineTraceMetrics.cpp130 PRCycles[PI->ProcResourceIdx] += PI->Cycles; in getResources()
583 Cycles.erase(&I); in invalidate()
776 unsigned Len = LIR.Height + Cycles[DefMI].Depth; in computeCrossBlockCriticalPath()
801 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth; in updateDepth()
809 InstrCycles &MICycles = Cycles[&UseMI]; in updateDepth()
1082 unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0; in computeInstrHeights()
1121 InstrCycles &MICycles = Cycles[&MI]; in computeInstrHeights()
1237 unsigned Cycles = 0; in getResourceLength() local
1247 Cycles += in getResourceLength()
1248 (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(ResourceIdx)); in getResourceLength()
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DMachineScheduler.cpp1899 RemainingCounts[PIdx] += (Factor * PI->Cycles); in init()
1945 unsigned Cycles) { in getNextResourceCycleByInstance() argument
1952 NextUnreserved += Cycles; in getNextResourceCycleByInstance()
1960 SchedBoundary::getNextResourceCycle(unsigned PIdx, unsigned Cycles) { in getNextResourceCycle() argument
1970 unsigned NextUnreserved = getNextResourceCycleByInstance(I, Cycles); in getNextResourceCycle()
2019 unsigned Cycles = PE.Cycles; in checkHazard() local
2021 std::tie(NRCycle, InstanceIdx) = getNextResourceCycle(ResIdx, Cycles); in checkHazard()
2024 MaxObservedStall = std::max(Cycles, MaxObservedStall); in checkHazard()
2172 countResource(unsigned PIdx, unsigned Cycles, unsigned NextCycle) { in countResource() argument
2174 unsigned Count = Factor * Cycles; in countResource()
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DMachinePipeliner.cpp531 DenseMap<MachineInstr *, int> Cycles, Stages; in schedule() local
537 Cycles[SU->getInstr()] = Cycle; in schedule()
543 Cycles[KV.first] = Cycles[KV.second]; in schedule()
548 ModuloSchedule MS(MF, &Loop, std::move(OrderedInsts), std::move(Cycles), in schedule()
943 if (!PRE.Cycles) in minFuncUnits()
986 if (!PRE.Cycles) in calcCriticalResources()
2955 if (!I->Cycles) in canReserveResources()
2965 I->Cycles); in canReserveResources()
2994 if (!PRE.Cycles) in reserveResources()
3004 ProcResource->NumUnits, PRE.Cycles); in reserveResources()
DEarlyIfConversion.cpp991 unsigned Cycles = 0; in shouldConvertIf() local
995 Cycles += NumCycles - 1; in shouldConvertIf()
999 return TII->isProfitableToIfCvt(IfBlock, Cycles, ExtraPredCost, in shouldConvertIf()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZHazardRecognizer.cpp190 if (PI->Cycles > 1) in dumpSU()
191 OS << "(" << PI->Cycles << "cyc)"; in dumpSU()
304 CurrCounter += PI->Cycles; in EmitInstruction()
404 Cost = PI->Cycles; in resourcesCost()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineTraceMetrics.h299 return TE.Cycles.lookup(&MI); in getInstrCycles()
325 DenseMap<const MachineInstr*, InstrCycles> Cycles; variable
DMachineScheduler.h749 unsigned Cycles);
752 unsigned Cycles);
775 unsigned countResource(unsigned PIdx, unsigned Cycles, unsigned ReadyCycle);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetItinerary.td43 // the execution of an instruction. Cycles represents the number of
52 // InstrStage<1, [FU_x, FU_y]> - TimeInc defaults to Cycles
59 int Cycles = cycles; // length of stage in machine cycles
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp406 unsigned Cycles[3] = { 2, 1, 0}; in getTransSwizzle() local
407 return Cycles[Op]; in getTransSwizzle()
410 unsigned Cycles[3] = { 1, 2, 2}; in getTransSwizzle() local
411 return Cycles[Op]; in getTransSwizzle()
414 unsigned Cycles[3] = { 2, 1, 2}; in getTransSwizzle() local
415 return Cycles[Op]; in getTransSwizzle()
418 unsigned Cycles[3] = { 2, 2, 1}; in getTransSwizzle() local
419 return Cycles[Op]; in getTransSwizzle()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiSchedule.td27 // Cycles for loads to access the cache [default = -1]
/third_party/protobuf/objectivec/Tests/
Dunittest_cycle.proto34 // Cycles in the Message graph can cause problems for message class
/third_party/node/deps/npm/docs/content/configuring-npm/
Dfolders.md122 #### Cycles, Conflicts, and Folder Parsimony
124 Cycles are handled using the property of node's module system that it

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