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/third_party/vk-gl-cts/external/amber/src/tools/
Dbuild-amber-sample.sh64 DX="$ANDROID_SDK_HOME/build-tools/$ANDROID_BUILD_TOOL_VERSION/dx --dex"
112 $DX --output="$BUILD_DIR/classes.dex" $BUILD_DIR
/third_party/skia/samplecode/
DSample3D.cpp234 DX = 400, enumerator
248 LightOnSphere fLight = {{200 + DX, 200 + DY}, 800, 12};
255 : fSphere({200 + DX, 200 + DY}, 400) in SampleCubeBase()
276 canvas->translate(DX, DY); in onDrawContent()
DSamplePatch.cpp200 static constexpr SkScalar DX = 20; variable
245 canvas->translate(DX, DY); in onDrawContent()
300 x -= DX; in onFindClickHandler()
311 fPts[((PtClick*)click)->fIndex].set(click->fCurr.fX - DX, click->fCurr.fY - DY); in onClick()
/third_party/skia/gm/
Ddropshadowimagefilter.cpp105 SkScalar DX = r.width() + MARGIN; variable
116 canvas->translate(DX, 0);
Dimagefilterscropped.cpp153 SkScalar DX = r.width() + MARGIN; in onDraw() local
166 canvas->translate(DX, 0); in onDraw()
Dimagemakewithfilter.cpp300 SkScalar DX = mainImage->width() + MARGIN; in onDraw() local
308 canvas->drawString(filterNames[i], DX * i + MARGIN, 15, font, textPaint); in onDraw()
336 canvas->translate(DX, 0); in onDraw()
Dimagefiltersbase.cpp244 SkScalar DX = r.width() + MARGIN; in onDraw() local
257 canvas->translate(DX, 0); in onDraw()
/third_party/flutter/skia/gm/
Ddropshadowimagefilter.cpp108 SkScalar DX = r.width() + MARGIN; variable
119 canvas->translate(DX, 0);
Dimagefilterscropped.cpp156 SkScalar DX = r.width() + MARGIN; in onDraw() local
169 canvas->translate(DX, 0); in onDraw()
Dimagemakewithfilter.cpp287 SkScalar DX = mainImage->width() + MARGIN; in onDraw() local
295 canvas->drawString(filterNames[i], DX * i + MARGIN, 15, font, textPaint); in onDraw()
323 canvas->translate(DX, 0); in onDraw()
Dimagefiltersbase.cpp199 SkScalar DX = r.width() + MARGIN; in onDraw() local
212 canvas->translate(DX, 0); in onDraw()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrArithmetic.td66 // AX,DX = AX*GR16
67 let Defs = [AX,DX,EFLAGS], Uses = [AX], hasSideEffects = 0 in
92 // AX,DX = AX*[mem16]
94 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
113 // AX,DX = AX*GR16
114 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
131 // AX,DX = AX*[mem16]
132 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
286 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
287 def DIV16r : I<0xF7, MRM6r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX
[all …]
DX86RegisterInfo.td116 def DX : X86Reg<"dx", 2, [DL,DH]>;
144 def EDX : X86Reg<"edx", 2, [DX, HDX]>, DwarfRegNum<[-2, 2, 2]>;
404 (add AX, CX, DX, SI, DI, BX, BP, SP,
445 def GR16_ABCD : RegisterClass<"X86", [i16], 16, (add AX, CX, DX, BX)>;
465 (add AX, CX, DX, SI, DI, BX, BP, SP)>;
508 // A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
DX86CallingConv.td42 let GPR_16 = [AX, CX, DX, DI, SI];
62 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R10W, R11W, R12W, R14W, R15W];
69 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R12W, R13W, R14W, R15W];
206 // Scalar values are returned in AX first, then DX. For i8, the ABI
219 CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>,
284 CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>,
393 CCIfType<[i16], CCAssignToReg<[AX, DX, CX, R8W]>>,
645 CCIfType<[i16], CCAssignToRegWithShadow<[CX , DX , R8W , R9W ],
878 CCIfInReg<CCIfType<[i16], CCAssignToReg<[ CX, DX]>>>,
DX86InstrSystem.td70 let Defs = [AL], Uses = [DX] in
72 let Defs = [AX], Uses = [DX] in
75 let Defs = [EAX], Uses = [DX] in
89 let Uses = [DX, AL] in
91 let Uses = [DX, AX] in
94 let Uses = [DX, EAX] in
DX86InstrExtension.td26 let Defs = [AX,DX], Uses = [AX] in // DX:AX = signext(AX)
/third_party/mesa3d/src/mesa/x86/
Dassyntax.h107 #define DX dx macro
169 #define DX %dx macro
442 #define IN_L CHOICE(inl (DX), inl ARG2(DX,EAX), _LTOG in DX)
443 #define IN_W CHOICE(inw (DX), inw ARG2(DX,AX), _WTOG in DX)
444 #define IN_B CHOICE(inb (DX), inb ARG2(DX,AL), inb DX)
555 #define OUT_L CHOICE(outl (DX), outl ARG2(EAX,DX), _LTOG out DX)
556 #define OUT_W CHOICE(outw (DX), outw ARG2(AX,DX), _WTOG out DX)
557 #define OUT_B CHOICE(outb (DX), outb ARG2(AL,DX), outb DX)
836 #define W_DX DX
1170 #define IN_L in EAX, DX
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp99 {codeview::RegisterId::DX, X86::DX}, in initLLVMToSEHAndCVRegMapping()
617 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
629 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
666 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
667 return X86::DX; in getX86SubSuperRegisterOrZero()
702 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
738 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
/third_party/flutter/skia/samplecode/
DSamplePatch.cpp200 static constexpr SkScalar DX = 20; variable
246 canvas->translate(DX, DY); in onDrawContent()
301 x -= DX; in onFindClickHandler()
312 fPts[((PtClick*)click)->fIndex].set(click->fCurr.fX - DX, click->fCurr.fY - DY); in onClick()
/third_party/vk-gl-cts/external/vulkan-docs/src/appendices/
DVK_EXT_depth_clip_enable.adoc26 This is useful for translating DX content which assumes depth clamping is
DVK_EXT_depth_clip_enable.txt26 This is useful for translating DX content which assumes depth clamping is
/third_party/ltp/tools/sparse/sparse-src/
Dcompile-i386.c204 AX, DX, CX, BX, SI, DI, BP, SP, // 16-bit enumerator
218 REGINFO( DL, "%dl", DX, EDX, EAX_EDX),
222 REGINFO( DH, "%dh", DX, EDX, EAX_EDX),
226 REGINFO( DX, "%dx", DL, DH, EDX, EAX_EDX),
234 REGINFO(EDX, "%edx", DL, DH, DX, EAX_EDX),
241 REGINFO(EAX_EDX, "%eax:%edx", AL, AH, AX, EAX, DL, DH, DX, EDX),
251 REGSTORAGE(AX), REGSTORAGE(DX), REGSTORAGE(CX), REGSTORAGE(BX),
263 #define REG_DX (&hardreg_storage_table[DX])
312 static struct regclass regclass_16 = { "16-bit", { AX, DX, CX, BX, SI, DI, BP }};
/third_party/skia/third_party/externals/opengl-registry/extensions/ARB/
DARB_map_buffer_alignment.txt111 1) Why 64 byte alignment and not 16 (like DX) or something else?
/third_party/rust/crates/memchr/bench/data/sliceslice/
Di386-notutf8.txt1555 processors. The word registers are named AX, BX, CX, DX, BP, SP, SI, and DI.
1558 CX, and DX has a separate name and can be treated as a unit. This feature is
1645 � EDX DH DX DL �
1932 of 32-bit operands; AX, BX, CX, DX, SI, DI, SP, or BP in the case of
2015 (AX, BX, CX, DX, SI, DI, SP, or BP), or in one of the 8-bit general
2508 word in register AX throughout register DX. CDQ extends the sign of the
2691 the contents of AX and returns the double-length result to DX and AX. If the
2753 Word DX:AX AX DX
7416 Using a value in DX, the program can specify:
7476 indirectly via the DX register to one of up to 64K port addresses.
[all …]
Di386.txt1555 processors. The word registers are named AX, BX, CX, DX, BP, SP, SI, and DI.
1558 CX, and DX has a separate name and can be treated as a unit. This feature is
1645 EDX DH DX DL
1932 of 32-bit operands; AX, BX, CX, DX, SI, DI, SP, or BP in the case of
2015 (AX, BX, CX, DX, SI, DI, SP, or BP), or in one of the 8-bit general
2508 word in register AX throughout register DX. CDQ extends the sign of the
2691 the contents of AX and returns the double-length result to DX and AX. If the
2753 Word DX:AX AX DX
7416 Using a value in DX, the program can specify:
7476 indirectly via the DX register to one of up to 64K port addresses.
[all …]

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