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Searched refs:DefSU (Results 1 – 3 of 3) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp308 SUnit *DefSU = I->SU; in addPhysRegDeps() local
309 if (DefSU == &ExitSU) in addPhysRegDeps()
311 if (DefSU != SU && in addPhysRegDeps()
313 !DefSU->getInstr()->registerDefIsDead(*Alias))) { in addPhysRegDeps()
315 DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias)); in addPhysRegDeps()
319 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps()
320 DefSU->addPred(Dep); in addPhysRegDeps()
479 SUnit *DefSU = V2SU.SU; in addVRegDefDeps() local
485 if (DefSU == SU) in addVRegDefDeps()
489 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
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DMachinePipeliner.cpp855 SUnit *DefSU = getSUnit(DefMI); in changeDependences() local
856 if (!DefSU) in changeDependences()
873 if (P->getSUnit() == DefSU) in changeDependences()
2567 SUnit *DefSU = Insts.at(MoveDef); in orderDependence() local
2577 orderDependence(SSD, DefSU, Insts); in orderDependence()
2593 SUnit *DefSU = SSD->getSUnit(&Phi); in isLoopCarried() local
2594 unsigned DefCycle = cycleScheduled(DefSU); in isLoopCarried()
2595 int DefStage = stageScheduled(DefSU); in isLoopCarried()
DMachineScheduler.cpp1335 const SUnit *DefSU = getSUnit(DefMI); in computeCyclicCriticalPath() local
1336 if (!DefSU) in computeCyclicCriticalPath()
1339 unsigned LiveOutHeight = DefSU->getHeight(); in computeCyclicCriticalPath()
1340 unsigned LiveOutDepth = DefSU->getDepth() + DefSU->Latency; in computeCyclicCriticalPath()
1360 unsigned LiveInHeight = SU->getHeight() + DefSU->Latency; in computeCyclicCriticalPath()
1367 LLVM_DEBUG(dbgs() << "Cyclic Path: SU(" << DefSU->NodeNum << ") -> SU(" in computeCyclicCriticalPath()