/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonFrameLowering.cpp | 283 const HexagonRegisterInfo &HRI) { in needsStackFrame() argument 311 for (MCSubRegIterator S(R, &HRI, true); S.isValid(); ++S) in needsStackFrame() 404 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in findShrunkPrologEpilog() local 436 for (const MCPhysReg *P = HRI.getCalleeSavedRegs(&MF); *P; ++P) in findShrunkPrologEpilog() 437 for (MCSubRegIterator S(*P, &HRI, true); S.isValid(); ++S) in findShrunkPrologEpilog() 441 if (needsStackFrame(I, CSR, HRI)) in findShrunkPrologEpilog() 505 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in emitPrologue() local 515 insertCSRSpillsInBlock(*PrologB, CSI, HRI, PrologueStubs); in emitPrologue() 520 insertCSRRestoresInBlock(*EpilogB, CSI, HRI); in emitPrologue() 525 insertCSRRestoresInBlock(B, CSI, HRI); in emitPrologue() [all …]
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D | HexagonInstrInfo.cpp | 126 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst() argument 127 return isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::isub_lo)) && in isDblRegForSubInst() 128 isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::isub_hi)); in isDblRegForSubInst() 791 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in copyPhysReg() local 852 Register LoSrc = HRI.getSubReg(SrcReg, Hexagon::vsub_lo); in copyPhysReg() 853 Register HiSrc = HRI.getSubReg(SrcReg, Hexagon::vsub_hi); in copyPhysReg() 879 << printReg(DestReg, &HRI) << " = " << printReg(SrcReg, &HRI) << '\n'; in copyPhysReg() 987 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in expandPostRAPseudo() local 1028 .addReg(HRI.getFrameRegister()) in expandPostRAPseudo() 1037 .addReg(HRI.getSubReg(SrcReg, Hexagon::vsub_hi), Kill) in expandPostRAPseudo() [all …]
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D | HexagonVLIWPacketizer.cpp | 116 const HexagonRegisterInfo *HRI = nullptr; member in __anon593eecc60111::HexagonPacketizer 139 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in INITIALIZE_PASS_DEPENDENCY() 208 HRI = HST.getRegisterInfo(); in runOnMachineFunction() 299 if (DepReg == HRI->getRARegister()) in isCallDependent() 303 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister()) in isCallDependent() 484 if (HII->isValidOffset(Opc, NewOff, HRI)) { in useCallersSP() 535 if (!HII->isValidOffset(MI.getOpcode(), Offset+Incr, HRI)) in updateOffset() 658 const TargetRegisterClass *PacketRC = HII->getRegClass(MCID, 0, HRI, MF); in canPromoteToNewValueStore() 708 predRegClass = HRI->getMinimalPhysRegClass(predRegNumSrc); in canPromoteToNewValueStore() 720 predRegClass = HRI->getMinimalPhysRegClass(predRegNumDst); in canPromoteToNewValueStore() [all …]
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D | HexagonBitSimplify.cpp | 438 auto &HRI = static_cast<const HexagonRegisterInfo&>( in parseRegSequence() local 440 unsigned SubLo = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_lo); in parseRegSequence() 441 unsigned SubHi = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_hi); in parseRegSequence() 902 auto &HRI = static_cast<const HexagonRegisterInfo&>( in getFinalVRegClass() local 905 auto VerifySR = [&HRI] (const TargetRegisterClass *RC, unsigned Sub) -> void { in getFinalVRegClass() 906 (void)HRI; in getFinalVRegClass() 907 assert(Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_lo) || in getFinalVRegClass() 908 Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_hi)); in getFinalVRegClass() 1054 : Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {} in RedundantInstrElimination() 1069 const HexagonRegisterInfo &HRI; member in __anon63ceeebe0511::RedundantInstrElimination [all …]
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D | HexagonVExtract.cpp | 104 const auto &HRI = *HST->getRegisterInfo(); in runOnMachineFunction() local 140 unsigned Align = HRI.getSpillAlignment(VecRC); in runOnMachineFunction() 146 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Align, in runOnMachineFunction() 161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction()
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D | HexagonGenMux.cpp | 89 const HexagonRegisterInfo *HRI = nullptr; member in __anon43c3ae660111::HexagonGenMux 147 for (MCSubRegIterator I(Reg, HRI); I.isValid(); ++I) in getSubRegs() 183 unsigned NR = HRI->getNumRegs(); in buildMaps() 355 LivePhysRegs LPR(*HRI); in genMuxInBlock() 358 for (MCSubRegIterator S(Reg, HRI, true); S.isValid(); ++S) in genMuxInBlock() 387 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction()
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D | HexagonConstExtenders.cpp | 383 const HexagonRegisterInfo *HRI = nullptr; member 445 : Rs(R), HRI(I) {} in PrintRegister() 447 const HexagonRegisterInfo &HRI; member 453 OS << printReg(P.Rs.Reg, &P.HRI, P.Rs.Sub); in operator <<() 461 : Ex(E), HRI(I) {} in PrintExpr() 463 const HexagonRegisterInfo &HRI; member 470 OS << printReg(P.Ex.Rs.Reg, &P.HRI, P.Ex.Rs.Sub); in operator <<() 479 : ExtI(EI), HRI(I) {} in PrintInit() 481 const HexagonRegisterInfo &HRI; member 487 << PrintExpr(P.ExtI.second, P.HRI) << ']'; in operator <<() [all …]
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D | HexagonISelDAGToDAG.h | 33 const HexagonRegisterInfo *HRI; variable 38 HRI(nullptr) {} in HexagonDAGToDAGISel() 44 HRI = HST->getRegisterInfo(); in runOnMachineFunction()
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D | HexagonGenInsert.cpp | 569 const HexagonRegisterInfo *HRI = nullptr; member in __anon8090aca10511::HexagonGenInsert 589 dbgs() << " " << printReg(I->first, HRI) << ":\n"; in dump_map() 592 dbgs() << " " << PrintIFR(LL[i].first, HRI) << ", " in dump_map() 593 << PrintRegSet(LL[i].second, HRI) << '\n'; in dump_map() 802 dbgs() << __func__ << ": " << printReg(VR, HRI) in findRecordInsertForms() 803 << " AVs: " << PrintORL(AVs, HRI) << "\n"; in findRecordInsertForms() 867 dbgs() << "Prefixes matching register " << printReg(VR, HRI) << "\n"; in findRecordInsertForms() 872 dbgs() << " (" << printReg(LL[i].first, HRI) << ",@" in findRecordInsertForms() 919 dbgs() << printReg(VR, HRI) << " = insert(" << printReg(SrcR, HRI) in findRecordInsertForms() 920 << ',' << printReg(InsR, HRI) << ",#" << L << ",#" in findRecordInsertForms() [all …]
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D | HexagonBranchRelaxation.cpp | 69 const HexagonRegisterInfo *HRI; member 96 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
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D | HexagonFrameLowering.h | 117 const HexagonRegisterInfo &HRI, bool &PrologueStubs) const; 119 const HexagonRegisterInfo &HRI) const;
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D | HexagonRDFOpt.cpp | 295 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() local 303 DataFlowGraph G(MF, HII, HRI, *MDT, MDF, TOI); in runOnMachineFunction()
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D | HexagonOptAddrMode.cpp | 84 const HexagonRegisterInfo *HRI = nullptr; member in __anon31af2ba50111::HexagonOptAddrMode 345 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false); in isValidOffset() 786 HRI = HST.getRegisterInfo(); in runOnMachineFunction() 791 DataFlowGraph G(MF, *HII, *HRI, *MDT, MDF, TOI); in runOnMachineFunction()
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D | HexagonVLIWPacketizer.h | 67 const HexagonRegisterInfo *HRI; variable
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D | HexagonISelLowering.cpp | 427 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local 429 DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT); in LowerCall() 493 unsigned VecAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); in LowerCall() 564 const uint32_t *Mask = HRI.getCallPreservedMask(MF, CallConv); in LowerCall() 632 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerINLINEASM() local 633 unsigned LR = HRI.getRARegister(); in LowerINLINEASM() 1021 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local 1041 unsigned Reg = MF.addLiveIn(HRI.getRARegister(), getRegClassFor(MVT::i32)); in LowerRETURNADDR() 1047 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local 1055 HRI.getFrameRegister(), VT); in LowerFRAMEADDR() [all …]
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D | HexagonBitTracker.cpp | 95 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in mask() local 96 bool IsSubLo = (Sub == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo)); in mask() 138 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in composeWithSubRegIndex() local 139 bool IsSubLo = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo)); in composeWithSubRegIndex() 140 bool IsSubHi = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi)); in composeWithSubRegIndex()
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D | HexagonAsmPrinter.cpp | 270 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in HexagonProcessInstruction() local 271 unsigned VectorSize = HRI.getRegSizeInBits(Hexagon::HvxVRRegClass) / 8; in HexagonProcessInstruction()
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D | HexagonConstPropagation.cpp | 1889 const HexagonRegisterInfo &HRI; member in __anon424bb67d0611::HexagonConstEvaluator 1922 HRI(*Fn.getSubtarget<HexagonSubtarget>().getRegisterInfo()) { in HexagonConstEvaluator() 1955 unsigned SubLo = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_lo); in evaluate() 1956 unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi); in evaluate() 2811 dbgs() << "Top " << printReg(R.Reg, &HRI, R.SubReg) in rewriteHexConstDefs()
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D | HexagonPatternsHVX.td | 69 int32_t VecSize = HRI->getSpillSize(Hexagon::HvxVRRegClass);
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/third_party/flutter/skia/third_party/externals/sfntly/java/src/com/google/typography/font/sfntly/table/opentype/ |
D | LanguageTag.java | 146 HRI("Harari", "har"), enumConstant
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/third_party/skia/third_party/externals/sfntly/java/src/com/google/typography/font/sfntly/table/opentype/ |
D | LanguageTag.java | 146 HRI("Harari", "har"), enumConstant
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/third_party/icu/icu4j/perf-tests/data/collation/ |
D | TestNames_SerbianSH.txt | 19360 HRIČANEK MIROSLAV 19361 HRIČANEK NEDELJKA
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/third_party/chromium/patch/ |
D | 0001-cve.patch | 57364 z`R*;rb~|rXtbM2M&YK2KTo<*6Z4I4DB<~7E`{HRI=jh#>YR^aPPQm6%xOUtz@o1!{
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