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Searched refs:IR3_REG_CONST (Results 1 – 14 of 14) sorted by relevance

/third_party/mesa3d/src/freedreno/isa/
Dencode.c107 if (src->flags & IR3_REG_CONST) { in __instruction_case()
112 } else if (src->flags & IR3_REG_CONST) { in __instruction_case()
276 if (reg->flags & IR3_REG_CONST) { in __multisrc_case()
281 } else if (reg->flags & IR3_REG_CONST) { in __multisrc_case()
299 if (reg->flags & IR3_REG_CONST) { in __cat3_src_case()
304 } else if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED)) { in __cat3_src_case()
/third_party/mesa3d/src/freedreno/ir3/
Dir3.c75 if (const_state->shared_consts_enable && reg->flags & IR3_REG_CONST) { in is_shared_consts()
117 if (reg->flags & IR3_REG_CONST) { in collect_reg_info()
854 flags &= (IR3_REG_CONST | IR3_REG_IMMED | IR3_REG_FNEG | IR3_REG_FABS | in cp_flags()
902 if (flags & ~(IR3_REG_IMMED | IR3_REG_CONST | IR3_REG_SHARED)) in ir3_valid_flags()
927 IR3_REG_IMMED | IR3_REG_CONST | IR3_REG_RELATIV | IR3_REG_SHARED; in ir3_valid_flags()
933 valid_flags = ir3_cat2_absneg(instr->opc) | IR3_REG_CONST | in ir3_valid_flags()
944 if (flags & (IR3_REG_CONST | IR3_REG_IMMED | IR3_REG_SHARED)) { in ir3_valid_flags()
951 if ((flags & (IR3_REG_CONST | IR3_REG_SHARED)) && in ir3_valid_flags()
952 (reg->flags & (IR3_REG_CONST | IR3_REG_SHARED))) in ir3_valid_flags()
972 valid_flags |= IR3_REG_CONST; in ir3_valid_flags()
[all …]
Dir3_cp.c139 *dstflags |= srcflags & IR3_REG_CONST; in combine_flags()
167 new_flags |= IR3_REG_CONST; in lower_immed()
292 new_flags |= IR3_REG_CONST; in try_swap_mad_two_srcs()
298 if (!(new_flags & IR3_REG_CONST)) in try_swap_mad_two_srcs()
419 if (src_reg->flags & IR3_REG_CONST) { in reg_cp()
Dir3_lower_parallelcopy.c58 } else if (reg->flags & IR3_REG_CONST) { in get_copy_src()
60 .flags = IR3_REG_CONST, in get_copy_src()
265 else if (entry->src.flags & IR3_REG_CONST) in do_copy()
299 assert(!(entry->src.flags & (IR3_REG_IMMED | IR3_REG_CONST))); in split_32bit_copy()
379 !(entry->src.flags & (IR3_REG_IMMED | IR3_REG_CONST))) { in _handle_copies()
Dir3_cse.c46 if (src->flags & IR3_REG_CONST) { in hash_instr()
90 if (i1_reg->flags & IR3_REG_CONST) { in instrs_equal()
Dir3_delay.c274 if (src->flags & (IR3_REG_IMMED | IR3_REG_CONST)) in delay_calc()
332 if (!(src->flags & (IR3_REG_IMMED | IR3_REG_CONST))) in ir3_delay_calc()
Dir3_spill.c341 if (!(reg->instr->srcs[0]->flags & (IR3_REG_IMMED | IR3_REG_CONST))) in can_rematerialize()
696 } else if (val->flags & IR3_REG_CONST) { in set_src_val()
697 src->flags = IR3_REG_CONST | (val->flags & IR3_REG_HALF); in set_src_val()
733 if (val->flags & (IR3_REG_CONST | IR3_REG_IMMED)) { in spill()
748 IR3_REG_CONST | IR3_REG_SSA | in spill()
1268 assert(src->flags & (IR3_REG_CONST | IR3_REG_IMMED)); in handle_pcopy()
1269 if (src->flags & IR3_REG_CONST) { in handle_pcopy()
1548 if ((pred_val->flags & (IR3_REG_IMMED | IR3_REG_CONST)) || in add_live_in_phi()
Dir3_print.c326 if (reg->flags & IR3_REG_CONST) in print_reg_name()
333 if (reg->flags & IR3_REG_CONST) in print_reg_name()
Dir3_postsched.c461 if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED)) in calculate_deps()
714 (IR3_REG_CONST | IR3_REG_IMMED | IR3_REG_RELATIV | IR3_REG_FNEG | in is_self_mov()
Dir3.h104 IR3_REG_CONST = 0x001, enumerator
912 if (!(instr->srcs[0]->flags & IR3_REG_CONST)) in is_const_mov()
1259 if (r->flags & (IR3_REG_CONST | IR3_REG_IMMED)) in reg_gpr()
1959 ir3_src_create(mov, n, IR3_REG_CONST | flags); in create_uniform_typed()
1980 ir3_src_create(mov, 0, IR3_REG_CONST | IR3_REG_RELATIV)->array.offset = n; in create_uniform_indirect()
Dir3_parser.y1293 const: T_CONSTANT { $$ = new_src($1, IR3_REG_CONST); }
1350 relative_const: 'c' '<' T_A0 offset '>' { new_src(0, IR3_REG_RELATIV | IR3_REG_CONST)->array.of…
1351 | T_HC '<' T_A0 offset '>' { new_src(0, IR3_REG_RELATIV | IR3_REG_CONST | IR3_REG…
Dir3_ra_validate.c295 if (src->flags & (IR3_REG_IMMED | IR3_REG_CONST)) { in propagate_parallelcopy()
Dir3_sched.c250 if (src->flags & (IR3_REG_IMMED | IR3_REG_CONST)) in cycle_count()
/third_party/mesa3d/src/freedreno/ir3/tests/
Ddelay.c137 if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED)) in fixup_wrmask()