/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCTLSDynamicCall.cpp | 79 Register InReg = MI.getOperand(1).getReg(); in processBlock() local 83 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock() 118 .addReg(InReg); in processBlock()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Attributes.gen | 14 InReg, 71 .Case("inreg", Attribute::InReg) 204 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Attributes.gen | 14 InReg, 71 .Case("inreg", Attribute::InReg) 204 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
D | Attributes.gen | 14 InReg, 71 .Case("inreg", Attribute::InReg) 204 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Attributes.gen | 14 InReg, 71 .Case("inreg", Attribute::InReg) 204 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
D | Attributes.inc | 14 InReg, 71 .Case("inreg", Attribute::InReg) 204 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Attributes.gen | 14 InReg, 71 .Case("inreg", Attribute::InReg) 204 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUCallLowering.cpp | 614 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local 617 if (!IsShader && InReg) in lowerFormalArguments() 625 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) { in lowerFormalArguments()
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D | AMDGPUMachineCFGStructurizer.cpp | 2739 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local 2741 MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion() 2742 Register NewInReg = MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion() 2747 LRegion->replaceRegisterInsideRegion(InReg, InnerSelectReg, false, MRI); in structurizeComplexRegion()
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D | AMDGPUTargetTransformInfo.cpp | 596 return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) || in isArgPassedInSGPR()
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D | AMDGPUAsmPrinter.cpp | 976 if (Arg.hasAttribute(Attribute::InReg)) in getSIProgramInfo()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
D | Attributes.inc | 15 InReg, 84 .Case("inreg", Attribute::InReg) 233 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/IR/ |
D | AttributesCompatFunc.inc | 15 InReg, 84 .Case("inreg", Attribute::InReg) 233 return llvm::Attribute::InReg;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | FastISel.h | 110 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee() 134 IsInReg = Call.hasRetAttr(Attribute::InReg);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 352 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local 388 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt() 389 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt() 399 Tmp0 = InReg; in LowerFPToInt() 401 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt() 409 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt() 425 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
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/third_party/mesa3d/src/amd/llvm/ |
D | ac_llvm_helper.cpp | 76 return AS.hasParamAttr(ArgNo, llvm::Attribute::InReg); in ac_is_sgpr_param()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86CallLowering.cpp | 347 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
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D | X86WinEHState.cpp | 415 Call->addParamAttr(0, Attribute::InReg); in generateLSDAInEAXThunk()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | Attributes.td | 62 def InReg : EnumAttr<"inreg">;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | CallLowering.cpp | 87 if (Attrs.hasAttribute(OpIdx, Attribute::InReg)) in setArgFlags()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
D | AMDGPUBaseInfo.cpp | 1238 return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) || in isArgPassedInSGPR()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 1406 unsigned InReg = It->second; in getCopyFromRegs() local 1409 DAG.getDataLayout(), InReg, Ty, in getCopyFromRegs() 1598 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local 1600 RegsForValue RFV(*DAG.getContext(), TLI, DAG.getDataLayout(), InReg, in getValueImpl() 1876 AttributeList::ReturnIndex, Attribute::InReg); in visitRet() 2571 if (GuardCheckFn->hasAttribute(1, Attribute::AttrKind::InReg)) in visitSPDescriptorParent() 9028 Attrs.push_back(Attribute::InReg); in getReturnAttrs() 9698 if (Arg.hasAttribute(Attribute::InReg)) { in LowerArguments()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
D | CodeExtractor.cpp | 859 case Attribute::InReg: in constructFunction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 2357 if (CS.paramHasAttr(ArgIdx, Attribute::InReg) || in SelectCall() 3032 if (Arg.hasAttribute(Attribute::InReg) || in fastLowerArguments()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringARM32.cpp | 3531 bool InReg = false; in lowerCall() local 3534 InReg = CC.argInGPR(Ty, &Reg); in lowerCall() 3536 InReg = CC.argInVFP(Ty, &Reg); in lowerCall() 3539 if (!InReg) { in lowerCall()
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