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Searched refs:InReg (Results 1 – 25 of 43) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCTLSDynamicCall.cpp79 Register InReg = MI.getOperand(1).getReg(); in processBlock() local
83 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock()
118 .addReg(InReg); in processBlock()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DAttributes.gen14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DAttributes.gen14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DAttributes.gen14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DAttributes.gen14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/IR/
DAttributes.inc14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DAttributes.gen14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUCallLowering.cpp614 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
617 if (!IsShader && InReg) in lowerFormalArguments()
625 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) { in lowerFormalArguments()
DAMDGPUMachineCFGStructurizer.cpp2739 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local
2741 MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2742 Register NewInReg = MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2747 LRegion->replaceRegisterInsideRegion(InReg, InnerSelectReg, false, MRI); in structurizeComplexRegion()
DAMDGPUTargetTransformInfo.cpp596 return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) || in isArgPassedInSGPR()
DAMDGPUAsmPrinter.cpp976 if (Arg.hasAttribute(Attribute::InReg)) in getSIProgramInfo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DAttributes.inc15 InReg,
84 .Case("inreg", Attribute::InReg)
233 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/IR/
DAttributesCompatFunc.inc15 InReg,
84 .Case("inreg", Attribute::InReg)
233 return llvm::Attribute::InReg;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DFastISel.h110 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
134 IsInReg = Call.hasRetAttr(Attribute::InReg);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp352 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
388 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
389 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
399 Tmp0 = InReg; in LowerFPToInt()
401 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
409 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
425 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
/third_party/mesa3d/src/amd/llvm/
Dac_llvm_helper.cpp76 return AS.hasParamAttr(ArgNo, llvm::Attribute::InReg); in ac_is_sgpr_param()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallLowering.cpp347 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
DX86WinEHState.cpp415 Call->addParamAttr(0, Attribute::InReg); in generateLSDAInEAXThunk()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DAttributes.td62 def InReg : EnumAttr<"inreg">;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCallLowering.cpp87 if (Attrs.hasAttribute(OpIdx, Attribute::InReg)) in setArgFlags()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp1238 return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) || in isArgPassedInSGPR()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp1406 unsigned InReg = It->second; in getCopyFromRegs() local
1409 DAG.getDataLayout(), InReg, Ty, in getCopyFromRegs()
1598 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
1600 RegsForValue RFV(*DAG.getContext(), TLI, DAG.getDataLayout(), InReg, in getValueImpl()
1876 AttributeList::ReturnIndex, Attribute::InReg); in visitRet()
2571 if (GuardCheckFn->hasAttribute(1, Attribute::AttrKind::InReg)) in visitSPDescriptorParent()
9028 Attrs.push_back(Attribute::InReg); in getReturnAttrs()
9698 if (Arg.hasAttribute(Attribute::InReg)) { in LowerArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DCodeExtractor.cpp859 case Attribute::InReg: in constructFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMFastISel.cpp2357 if (CS.paramHasAttr(ArgIdx, Attribute::InReg) || in SelectCall()
3032 if (Arg.hasAttribute(Attribute::InReg) || in fastLowerArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceTargetLoweringARM32.cpp3531 bool InReg = false; in lowerCall() local
3534 InReg = CC.argInGPR(Ty, &Reg); in lowerCall()
3536 InReg = CC.argInVFP(Ty, &Reg); in lowerCall()
3539 if (!InReg) { in lowerCall()

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