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Searched refs:Kill (Results 1 – 25 of 232) sorted by relevance

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/third_party/glslang/Test/baseResults/
Dhlsl.discard.frag.out16 0:4 Branch: Kill
34 0:11 Branch: Kill
42 0:13 Branch: Kill
72 0:4 Branch: Kill
90 0:11 Branch: Kill
98 0:13 Branch: Kill
166 Kill
185 Kill
190 Kill
Dhlsl.spv.1.6.discard.frag.out16 0:4 Branch: Kill
34 0:11 Branch: Kill
42 0:13 Branch: Kill
72 0:4 Branch: Kill
90 0:11 Branch: Kill
98 0:13 Branch: Kill
Dhlsl.clip.frag.out21 0:9 Branch: Kill
60 0:9 Branch: Kill
120 Kill
DearlyReturnDiscard.frag.out51 0:37 Branch: Kill
96 0:49 Branch: Kill
107 0:56 Branch: Kill
181 0:37 Branch: Kill
226 0:49 Branch: Kill
237 0:56 Branch: Kill
Dspv.earlyReturnDiscard.frag.out112 Kill
151 Kill
169 Kill
DversionsClean.frag.out18 0:44 Branch: Kill
39 0:44 Branch: Kill
DversionsErrors.frag.out20 0:45 Branch: Kill
40 0:45 Branch: Kill
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRFrameLowering.cpp72 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
81 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
88 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
92 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
93 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
132 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
173 .addReg(AVR::R0, RegState::Kill); in emitEpilogue()
209 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
216 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
404 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
[all …]
DAVRRegisterInfo.cpp197 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
225 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
232 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
237 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreRegisterInfo.cpp108 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
115 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
121 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
184 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
185 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
191 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
197 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DLiveRangeCalc.h111 SlotIndex Kill; member
117 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
270 SlotIndex Kill = SlotIndex()) {
271 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
DLiveInterval.h93 const bool Kill; variable
97 bool Kill) in LiveQueryResult() argument
98 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
112 return Kill; in isKill()
488 SlotIndex StartIdx, SlotIndex Kill);
495 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
545 bool Kill = false; in Query() local
551 Kill = true; in Query()
553 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
568 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonSplitDouble.cpp653 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
656 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
662 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
666 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
771 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
811 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
836 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
839 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
842 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
848 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp569 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
574 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
594 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
599 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
673 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
680 .addReg(Reg, RegState::Kill), in lowerCRSpilling()
719 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
724 .addReg(Reg, RegState::Kill); in lowerCRRestore()
822 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
827 .addReg(Reg, RegState::Kill), in lowerCRBitSpilling()
[all …]
DPPCFrameLowering.cpp391 .addReg(SrcReg, RegState::Kill) in HandleVRSaveUpdate()
400 .addReg(SrcReg, RegState::Kill) in HandleVRSaveUpdate()
409 .addReg(SrcReg, RegState::Kill) in HandleVRSaveUpdate()
413 .addReg(DstReg, RegState::Kill) in HandleVRSaveUpdate()
974 CrState = RegState::Kill; in emitPrologue()
999 CrState = RegState::Kill; in emitPrologue()
1073 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
1080 .addReg(TempReg, RegState::Kill) in emitPrologue()
1083 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
1084 .addReg(TempReg, RegState::Kill); in emitPrologue()
[all …]
/third_party/openh264/codec/common/src/
DWelsThread.cpp56 Kill(); in ~CWelsThread()
102 void CWelsThread::Kill() { in Kill() function in WelsCommon::CWelsThread
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp82 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY()
95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb1FrameLowering.cpp91 .addReg(ARM::SP).addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
413 .addReg(ARM::SP, RegState::Kill) in emitPrologue()
418 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
424 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
429 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
729 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
745 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
782 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
788 .addReg(TemporaryReg, RegState::Kill) in emitPopSpecialFixUp()
921 PushMIB.addReg(Reg, RegState::Kill); in spillCalleeSavedRegisters()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp107 .addReg(SpillReg, RegState::Kill) in buildPrologSpill()
127 .addReg(SpillReg, RegState::Kill) in buildPrologSpill()
128 .addReg(OffsetReg, RegState::Kill) in buildPrologSpill()
175 .addReg(OffsetReg, RegState::Kill) in buildEpilogReload()
255 .addReg(FlatScrInitHi, RegState::Kill); in emitFlatScratchInit()
265 .addReg(FlatScrInitLo, RegState::Kill) in emitFlatScratchInit()
490 .addReg(PreloadedPrivateBufferReg, RegState::Kill); in emitEntryFunctionPrologue()
502 .addReg(PreloadedScratchWaveOffsetReg, HasFP ? RegState::Kill : 0); in emitEntryFunctionPrologue()
507 .addReg(PreloadedPrivateBufferReg, RegState::Kill); in emitEntryFunctionPrologue()
747 .addReg(ScratchExecCopy, RegState::Kill); in emitPrologue()
[all …]
/third_party/ltp/testcases/network/stress/ns-tools/
D00_Descriptions.txt41 Kill all of the icmp traffic utilities (ping or ping6)
44 Kill all of the udp traffic utilities (ns-udpserver, ns-udpclient)
47 Kill all of the tcp traffic utilities (ns-tcpserver, ns-tcpclient)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DExecutionDomainFix.cpp235 void ExecutionDomainFix::processDefs(MachineInstr *MI, bool Kill) { in processDefs() argument
251 if (Kill) in processDefs()
404 bool Kill = false; in processBasicBlock() local
406 Kill = visitInstr(&MI); in processBasicBlock()
407 processDefs(&MI, Kill); in processBasicBlock()
DLiveRangeCalc.cpp226 if (I.Kill.isValid()) in updateFromLiveIns()
228 End = I.Kill; in updateFromLiveIns()
474 LiveIn.back().Kill = Use; in findReachingDefs()
560 if (I.Kill.isValid()) { in updateSSA()
562 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI)); in updateSSA()
573 if (I.Kill.isValid()) in updateSSA()
/third_party/glslang/SPIRV/
Ddisassemble.cpp67 static void Kill(std::ostream& out, const char* message) in Kill() function
133 Kill(out, "stream is too short"); in validate()
157 Kill(out, "bad schema, must be 0"); in validate()
177 Kill(out, "stream instruction terminated too early"); in processInstructions()
225 Kill(out, "Bad <id>"); in formatId()
259 Kill(out, "Bad <id>"); in outputId()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp158 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
161 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
164 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
168 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
184 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
187 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
280 .addReg(Dest, RegState::Kill).addReg(OldVal).addMBB(exitMBB); in expandAtomicCmpSwap()
290 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB); in expandAtomicCmpSwap()
559 .addReg(Dest, RegState::Kill) in expandAtomicBinOpSubword()
562 .addReg(Dest, RegState::Kill) in expandAtomicBinOpSubword()
DMips16InstrInfo.cpp290 MIB2.addReg(Mips::SP, RegState::Kill); in adjustStackPtrBig()
293 MIB3.addReg(Reg2, RegState::Kill); in adjustStackPtrBig()
296 MIB4.addReg(Reg1, RegState::Kill); in adjustStackPtrBig()
418 .addReg(SpReg, RegState::Kill) in loadImmediate()
423 .addReg(Reg, RegState::Kill); in loadImmediate()

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