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Searched refs:LaneMask (Results 1 – 25 of 49) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DRegisterPressure.h41 LaneBitmask LaneMask; member
43 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
44 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
264 LaneBitmask LaneMask; member
266 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair()
267 : Index(Index), LaneMask(LaneMask) {} in IndexMaskPair()
300 return I->LaneMask; in contains()
307 auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask)); in insert()
309 LaneBitmask PrevMask = InsertRes.first->LaneMask; in insert()
310 InsertRes.first->LaneMask |= Pair.LaneMask; in insert()
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DScheduleDAGInstrs.h54 LaneBitmask LaneMask; member
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
DLiveInterval.h689 LaneBitmask LaneMask; variable
692 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument
695 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
697 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange()
775 LaneBitmask LaneMask) { in createSubRange() argument
776 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
784 LaneBitmask LaneMask, in createSubRangeFrom() argument
786 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
820 LaneBitmask LaneMask,
863 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
DMachineBasicBlock.h74 LaneBitmask LaneMask;
76 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
77 : PhysReg(PhysReg), LaneMask(LaneMask) {}
316 LaneBitmask LaneMask = LaneBitmask::getAll()) {
317 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
338 LaneBitmask LaneMask = LaneBitmask::getAll());
342 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
DTargetRegisterInfo.h54 const LaneBitmask LaneMask; variable
204 return LaneMask; in getLaneMask()
594 LaneBitmask LaneMask) const { in reverseComposeSubRegIndexLaneMask() argument
596 return LaneMask; in reverseComposeSubRegIndexLaneMask()
597 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in reverseComposeSubRegIndexLaneMask()
DLiveIntervals.h477 LaneBitmask LaneMask);
487 LaneBitmask LaneMask = LaneBitmask::getAll());
DLiveRangeCalc.h172 void extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DRegisterPressure.cpp101 if (!P.LaneMask.all()) in dump()
102 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
109 if (!P.LaneMask.all()) in dump()
110 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
367 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
378 return I->LaneMask; in getRegLanes()
384 assert(Pair.LaneMask.any()); in addRegLanes()
391 I->LaneMask |= Pair.LaneMask; in addRegLanes()
403 I->LaneMask = LaneBitmask::getNone(); in setRegZero()
410 assert(Pair.LaneMask.any()); in removeRegLanes()
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DMachineVerifier.cpp252 LaneBitmask LaneMask) const;
258 void report_context_lanemask(LaneBitmask LaneMask) const;
267 LaneBitmask LaneMask = LaneBitmask::getNone());
271 LaneBitmask LaneMask = LaneBitmask::getNone());
287 LaneBitmask LaneMask = LaneBitmask::getNone());
528 LaneBitmask LaneMask) const { in report_context()
531 if (LaneMask.any()) in report_context()
532 report_context_lanemask(LaneMask); in report_context()
563 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
564 errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n'; in report_context_lanemask()
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DScheduleDAGInstrs.cpp384 return (RegUse->LaneMask & getLaneMaskForMO(MO)).none(); in deadDefHasNoUse()
434 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
436 if ((LaneMask & KillLaneMask).none()) { in addVRegDefDeps()
441 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps()
451 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
453 if (LaneMask.any()) { in addVRegDefDeps()
454 I->LaneMask = LaneMask; in addVRegDefDeps()
472 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
476 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps()
495 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
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DLiveIntervals.cpp367 unsigned Reg, LaneBitmask LaneMask) { in extendSegmentsToUses() argument
378 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
379 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
387 const LiveRange &OldRange = getSubRange(LI, LaneMask); in extendSegmentsToUses()
434 assert(LaneMask.any() && in extendSegmentsToUses()
437 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); in extendSegmentsToUses()
569 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
570 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
598 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
783 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
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DRenameIndependentSubregs.cpp183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
187 if ((SR.LaneMask & LaneMask).none()) in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
232 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands()
285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
DMachineBasicBlock.cpp400 if (!LI.LaneMask.all()) in print()
401 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print()
448 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
454 I->LaneMask &= ~LaneMask; in removeLiveIn()
455 if (I->LaneMask.none()) in removeLiveIn()
466 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn()
469 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
483 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
485 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
487 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
DLiveInterval.cpp884 LaneBitmask LaneMask, in stripValuesNotDefiningMask() argument
914 if ((ExpectedDefMask & LaneMask).none()) in stripValuesNotDefiningMask()
931 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges() argument
935 LaneBitmask ToApply = LaneMask; in refineSubRanges()
937 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
938 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
949 SR.LaneMask = SRMask & ~Matching; in refineSubRanges()
956 stripValuesNotDefiningMask(reg, SR, SR.LaneMask, Indexes, TRI, in refineSubRanges()
977 LaneBitmask LaneMask, in computeSubRangeUndefs() argument
982 assert((VRegMask & LaneMask).any()); in computeSubRangeUndefs()
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DSplitKit.cpp410 if (S.LaneMask == LM) in getSubRangeForMask()
427 auto &PS = getSubRangeForMask(S.LaneMask, Edit->getParent()); in addDeadDef()
451 if ((S.LaneMask & LM).any()) in addDeadDef()
529 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubIdx); in buildSingleSubRegCopy() local
530 DestLI.refineSubRanges(Allocator, LaneMask, in buildSingleSubRegCopy()
539 LaneBitmask LaneMask, MachineBasicBlock &MBB, in buildCopy() argument
542 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { in buildCopy()
568 if (SubRegMask == LaneMask) { in buildCopy()
574 if ((SubRegMask & ~LaneMask).any()) in buildCopy()
594 LaneBitmask LanesLeft = LaneMask & ~(TRI.getSubRegIndexLaneMask(BestIdx)); in buildCopy()
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DRegisterCoalescer.cpp243 LaneBitmask LaneMask, CoalescerPair &CP,
249 LaneBitmask LaneMask, const CoalescerPair &CP);
967 MaskA |= SA.LaneMask; in removeCopyByCommutingDef()
970 Allocator, SA.LaneMask, in removeCopyByCommutingDef()
987 if ((SB.LaneMask & MaskA).any()) in removeCopyByCommutingDef()
1386 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1421 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1443 if ((SR.LaneMask & DstMask).none()) { in reMaterializeTrivialDef()
1446 << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n"); in reMaterializeTrivialDef()
1565 if ((SR.LaneMask & SrcMask).none()) in eliminateUndefCopy()
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DVirtRegMap.cpp292 LaneBitmask LaneMask; in addLiveInsForSubRanges() local
301 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
303 if (LaneMask.none()) in addLiveInsForSubRanges()
306 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
368 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
DLiveRangeEdit.cpp49 LI.createSubRange(Alloc, S.LaneMask); in createEmptyIntervalFrom()
251 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill() local
253 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
DLiveRegUnits.cpp81 LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask); in addBlockLiveIns()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFormMemoryClauses.cpp65 void forAllLanes(unsigned Reg, LaneBitmask LaneMask, Callable Func) const;
154 void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask, in forAllLanes() argument
156 if (LaneMask.all() || Register::isPhysicalRegister(Reg) || in forAllLanes()
157 LaneMask == MRI->getMaxLaneMaskForVReg(Reg)) { in forAllLanes()
171 if (SubRegMask == LaneMask) { in forAllLanes()
176 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) in forAllLanes()
194 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) in forAllLanes()
198 LaneMask &= ~SubRegMask; in forAllLanes()
199 if (LaneMask.none()) in forAllLanes()
DGCNRegPressure.cpp246 I->LaneMask |= UsedMask; in collectVirtualRegUses()
265 LiveMask |= S.LaneMask; in getLiveLaneMask()
325 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); in recede()
348 LiveMask |= U.LaneMask; in recede()
384 It.second &= ~S.LaneMask; in advanceBeforeNext()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DLaneBitmask.h93 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument
94 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask()
95 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DRDFRegisters.cpp37 if (RC->LaneMask != RI.RegClass->LaneMask) { in PhysicalRegisterInfo()
67 UI.Mask = RC->LaneMask; in PhysicalRegisterInfo()
172 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) in aliasRM()
232 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
DRDFCopy.cpp124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) in run()
DHexagonBlockRanges.cpp240 if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) { in getLiveIns()
246 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()

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