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Searched refs:MCInstrDesc (Results 1 – 25 of 176) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h38 class MCInstrDesc; variable
317 const MCInstrDesc &MCID) { in BuildMI()
324 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
334 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
350 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
359 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
369 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
380 const MCInstrDesc &MCID) { in BuildMI()
390 const MCInstrDesc &MCID) { in BuildMI()
399 const MCInstrDesc &MCID) { in BuildMI()
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DDFAPacketizer.h45 class MCInstrDesc; variable
79 bool canReserveResources(const MCInstrDesc *MID);
83 void reserveResources(const MCInstrDesc *MID);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCInstrDesc.cpp21 bool MCInstrDesc::getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, in getDeprecatedInfo()
32 bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, in mayAffectControlFlow()
44 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg()
53 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, in hasDefOfPhysReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore()
39 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isLoadAfterStore()
55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet()
65 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isBCTRAfterSet()
85 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst()
147 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother()
175 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction()
282 const MCInstrDesc &MCID = DAG.TII->get(Opcode); in GetInstrType()
DPPCFrameLowering.cpp839 const MCInstrDesc& MFLRInst = TII.get(isPPC64 ? PPC::MFLR8 in emitPrologue()
841 const MCInstrDesc& StoreInst = TII.get(isPPC64 ? PPC::STD in emitPrologue()
843 const MCInstrDesc& StoreUpdtInst = TII.get(isPPC64 ? PPC::STDU in emitPrologue()
845 const MCInstrDesc& StoreUpdtIdxInst = TII.get(isPPC64 ? PPC::STDUX in emitPrologue()
847 const MCInstrDesc& LoadImmShiftedInst = TII.get(isPPC64 ? PPC::LIS8 in emitPrologue()
849 const MCInstrDesc& OrImmInst = TII.get(isPPC64 ? PPC::ORI8 in emitPrologue()
851 const MCInstrDesc& OrInst = TII.get(isPPC64 ? PPC::OR8 in emitPrologue()
853 const MCInstrDesc& SubtractCarryingInst = TII.get(isPPC64 ? PPC::SUBFC8 in emitPrologue()
855 const MCInstrDesc& SubtractImmCarryingInst = TII.get(isPPC64 ? PPC::SUBFIC8 in emitPrologue()
1407 const MCInstrDesc& MTLRInst = TII.get( isPPC64 ? PPC::MTLR8 in emitEpilogue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.h25 class MCInstrDesc; variable
47 const MCInstrDesc &II,
62 const MCInstrDesc *II,
73 const MCInstrDesc *II,
DInstrEmitter.cpp132 const MCInstrDesc &II = TII->get(User->getMachineOpcode()); in EmitCopyFromReg()
191 const MCInstrDesc &II, in CreateVirtualRegisters()
294 const MCInstrDesc *II, in AddRegisterOperand()
303 const MCInstrDesc &MCID = MIB->getDesc(); in AddRegisterOperand()
365 const MCInstrDesc *II, in AddOperand()
634 const MCInstrDesc &II = TII->get(TargetOpcode::REG_SEQUENCE); in EmitRegSequence()
713 const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE); in EmitDbgValue()
772 const MCInstrDesc &II = TII->get(TargetOpcode::DBG_LABEL); in EmitDbgLabel()
811 const MCInstrDesc &II = TII->get(Opc); in EmitMachineNode()
955 const MCInstrDesc &MCID = TII->get(F->getMachineOpcode()); in EmitMachineNode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrInfo.h24 const MCInstrDesc *Desc; // Raw array to allow static init'n
32 void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND, in InitMCInstrInfo()
44 const MCInstrDesc &get(unsigned Opcode) const { in get()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp21 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
42 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType()
45 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
DARMBaseInstrInfo.h350 const MCInstrDesc &DefMCID,
354 const MCInstrDesc &DefMCID,
358 const MCInstrDesc &UseMCID,
362 const MCInstrDesc &UseMCID,
366 const MCInstrDesc &DefMCID,
368 const MCInstrDesc &UseMCID,
373 const MCInstrDesc &DefMCID, unsigned DefAdj,
376 const MCInstrDesc &UseMCID, unsigned UseAdj) const;
DMLxExpansionPass.cpp184 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
284 const MCInstrDesc &MCID1 = TII->get(MulOpc); in ExpandFPMLxInstruction()
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
339 const MCInstrDesc &MCID = MI->getDesc(); in ExpandFPMLxInstructions()
DThumb2SizeReduction.cpp254 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) { in HasImplicitCPSRDef()
645 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial()
791 const MCInstrDesc &NewMCID = TII->get(Entry.NarrowOpc2); in ReduceTo2Addr()
805 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr()
865 const MCInstrDesc &MCID = MI->getDesc(); in ReduceToNarrow()
884 const MCInstrDesc &NewMCID = TII->get(Entry.NarrowOpc1); in ReduceToNarrow()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SIMDInstrOpt.cpp160 bool shouldReplaceInst(MachineFunction *MF, const MCInstrDesc *InstDesc,
161 SmallVectorImpl<const MCInstrDesc*> &ReplInstrMCID);
218 shouldReplaceInst(MachineFunction *MF, const MCInstrDesc *InstDesc, in shouldReplaceInst()
219 SmallVectorImpl<const MCInstrDesc*> &InstDescRepl) { in shouldReplaceInst()
274 const MCInstrDesc* OriginalMCID; in shouldExitEarly()
275 SmallVector<const MCInstrDesc*, MaxNumRepl> ReplInstrMCID; in shouldExitEarly()
351 const MCInstrDesc *MulMCID, *DupMCID; in optimizeVectElement()
417 SmallVector<const MCInstrDesc*, 2> ReplInstrMCID; in optimizeVectElement()
510 SmallVector<const MCInstrDesc*, MaxNumRepl> ReplInstrMCID; in optimizeLdStInterleave()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DDFAPacketizer.cpp57 bool DFAPacketizer::canReserveResources(const MCInstrDesc *MID) { in canReserveResources()
66 void DFAPacketizer::reserveResources(const MCInstrDesc *MID) { in reserveResources()
76 const MCInstrDesc &MID = MI.getDesc(); in canReserveResources()
83 const MCInstrDesc &MID = MI.getDesc(); in reserveResources()
DScoreboardHazardRecognizer.cpp122 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType()
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h577 bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo);
580 bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo);
583 bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo);
592 unsigned getRegOperandSize(const MCRegisterInfo *MRI, const MCInstrDesc &Desc,
632 inline unsigned getOperandSize(const MCInstrDesc &Desc, unsigned OpNo) { in getOperandSize()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrInfo.h24 class MCInstrDesc; variable
100 const MCInstrDesc& AddiuSpImm(int64_t Imm) const;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DUtils.h31 class MCInstrDesc; variable
80 MachineInstr &InsertPt, const MCInstrDesc &II,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp87 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI); in init()
302 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in reportBranchErrors()
313 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in checkHWLoop()
327 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in checkCOFMax1()
454 MCInstrDesc const &Desc = in checkNewValues()
529 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in registerProducer()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp286 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction()
381 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in getSDWASrcEncoding()
475 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in getMachineOpValue()
490 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in getMachineOpValue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DInstrBuilder.cpp203 static void computeMaxLatency(InstrDesc &ID, const MCInstrDesc &MCDesc, in computeMaxLatency()
218 static Error verifyOperands(const MCInstrDesc &MCDesc, const MCInst &MCI) { in verifyOperands()
249 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateWrites()
419 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateReads()
515 const MCInstrDesc &MCDesc = MCII.get(Opcode); in createInstrDescImpl()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp127 const MCInstrDesc &MID = MI.getDesc(); in INITIALIZE_PASS_DEPENDENCY()
194 const MCInstrDesc &UseMID = UseMI.getDesc(); in canRemoveAddasl()
357 const MCInstrDesc &MID = MI->getDesc(); in processAddUses()
416 const MCInstrDesc &MID = UseMI->getDesc(); in updateAddUses()
444 const MCInstrDesc &MID = MI.getDesc(); in analyzeUses()
625 const MCInstrDesc &UseMID = UseMI->getDesc(); in changeAddAsl()
672 const MCInstrDesc &MID = UseMI->getDesc(); in xformUseMI()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp115 bool &Rex, const MCInst &MI, const MCInstrDesc &Desc,
119 const MCInst &MI, const MCInstrDesc &Desc,
126 const MCInst &MI, const MCInstrDesc &Desc,
130 const MCInstrDesc &Desc) const;
277 const MCInstrDesc &Desc = MCII.get(Opcode); in isPCRel32Branch()
637 const MCInst &MI, const MCInstrDesc &Desc, in emitPrefixImpl()
741 const MCInstrDesc &Desc, in emitVEXOpcodePrefix()
1171 const MCInstrDesc &Desc) const { in determineREXPrefix()
1297 const MCInstrDesc &Desc, in emitOpcodePrefix()
1361 const MCInstrDesc &Desc = MCII.get(Opcode); in emitPrefix()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp345 const MCInstrDesc &Desc = MI.getDesc(); in chooseBestLEA()
448 const MCInstrDesc &Desc = MI.getDesc(); in isReplaceable()
514 const MCInstrDesc &Desc = MI.getDesc(); in removeRedundantAddrCalc()
643 const MCInstrDesc &Desc = MI.getDesc(); in removeRedundantLEAs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrBuilder.h30 const MCInstrDesc &MCID = MI->getDesc(); in addFrameReference()

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